Other Parts Discussed in Thread: SFRA
Tool/software: Code Composer Studio
Hello,
The strange problem when I re-build a project for RAM to FLASH mode.
Error message is "
<Linking>
error #10430-D: ".TI.ramfunc" section generated by __attribute__((ramfunc)) or --ramfunc=on requires a SECTIONS specification to function.
error #10010: errors encountered during linking; "main.out" not built
"
and the link command file attached also.
/////////////////////////////////////////////////////////////////////////////
// The user must define CLA_C in the project linker settings if using the
// CLA C compiler
// Project Properties -> C2000 Linker -> Advanced Options -> Command File
// Preprocessing -> --define
//#ifdef CLA_C
// Define a size for the CLA scratchpad area that will be used
// by the CLA compiler for local symbols and temps
// Also force references to the special symbols that mark the
// scratchpad are.
CLA_SCRATCHPAD_SIZE = 0x100;
--undef_sym=__cla_scratchpad_end
--undef_sym=__cla_scratchpad_start
//#endif CLA_C
MEMORY
{
PAGE 0 :
/* BEGIN is used for the "boot to SARAM" bootloader mode */
#if defined(RAM)
BEGIN : origin = 0x000000, length = 0x000002
#elif defined(FLASH)
BEGIN : origin = 0x080000, length = 0x000002
#endif
RAMM0 : origin = 0x000122, length = 0x0002DE
RAMD0 : origin = 0x00B000, length = 0x000800
RAMD1 : origin = 0x00B800, length = 0x000800
RAMLS0 : origin = 0x008000, length = 0x000800
RAMLS1 : origin = 0x008800, length = 0x000800
RAMLS2 : origin = 0x009000, length = 0x000800
RAMLS3 : origin = 0x009800, length = 0x000800
RAMLS4 : origin = 0x00A000, length = 0x000800
RAMLS5 : origin = 0x00A800, length = 0x000800
RAMGS0 : origin = 0x00C000, length = 0x001000
RAMGS12 : origin = 0x018000, length = 0x001000
RAMGS13 : origin = 0x019000, length = 0x001000
RAMGS14 : origin = 0x01A000, length = 0x001000
RAMGS15 : origin = 0x01B000, length = 0x001000
FLASHA : origin = 0x080002, length = 0x001FFE /* on-chip Flash */
FLASHC : origin = 0x084000, length = 0x002000 /* on-chip Flash */
FLASHD : origin = 0x086000, length = 0x002000 /* on-chip Flash */
FLASHE : origin = 0x088000, length = 0x008000 /* on-chip Flash */
FLASHF : origin = 0x090000, length = 0x008000 /* on-chip Flash */
FLASHG : origin = 0x098000, length = 0x008000 /* on-chip Flash */
FLASHH : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */
FLASHI : origin = 0x0A8000, length = 0x008000 /* on-chip Flash */
FLASHJ : origin = 0x0B0000, length = 0x008000 /* on-chip Flash */
FLASHK : origin = 0x0B8000, length = 0x002000 /* on-chip Flash */
FLASHL : origin = 0x0BA000, length = 0x002000 /* on-chip Flash */
FLASHM : origin = 0x0BC000, length = 0x002000 /* on-chip Flash */
FLASHN : origin = 0x0BE000, length = 0x002000 /* on-chip Flash */
RESET : origin = 0x3FFFC0, length = 0x000002
PAGE 1 :
BOOT_RSVD : origin = 0x000002, length = 0x000120 /* Part of M0, BOOT rom will use this for stack */
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
RAMLS0 : origin = 0x008000, length = 0x000800
RAMLS1 : origin = 0x008800, length = 0x000800
RAMLS2 : origin = 0x009000, length = 0x000800
RAMLS3 : origin = 0x009800, length = 0x000800
RAMGS1 : origin = 0x00D000, length = 0x001000
RAMGS2 : origin = 0x00E000, length = 0x001000
RAMGS3 : origin = 0x00F000, length = 0x001000
// RAMGS4 : origin = 0x010000, length = 0x001000
// RAMGS5 : origin = 0x011000, length = 0x001000
// RAMGS6 : origin = 0x012000, length = 0x001000
// RAMGS7 : origin = 0x013000, length = 0x001000
// RAMGS8 : origin = 0x014000, length = 0x001000
// RAMGS9 : origin = 0x015000, length = 0x001000
// RAMGS10 : origin = 0x016000, length = 0x001000
// RAMGS11 : origin = 0x017000, length = 0x001000
RAMGS45 : origin = 0x010000, length = 0x002000
RAMGS67 : origin = 0x012000, length = 0x002000
RAMGS89 : origin = 0x014000, length = 0x002000
RAMGS1011 : origin = 0x016000, length = 0x002000
FLASHB : origin = 0x082000, length = 0x002000 /* on-chip Flash */
CLA1_MSGRAMLOW : origin = 0x001480, length = 0x000080
CLA1_MSGRAMHIGH : origin = 0x001500, length = 0x000080
}
SECTIONS
{
#if defined(RAM)
codestart : > BEGIN, PAGE = 0
ramfuncs : > RAMM0 PAGE = 0
.text : >> RAMM0|RAMD0|RAMD1|RAMLS0|RAMLS1|RAMLS2|RAMLS3|RAMLS4|RAMLS5|RAMGS0|RAMGS12|RAMGS13|RAMGS14|RAMGS15, PAGE = 0
.cinit : >> RAMM0|RAMGS14|RAMGS15, PAGE = 0
.pinit : > RAMM0, PAGE = 0
.switch : > RAMM0, PAGE = 0
.econst : > RAMLS3, PAGE = 1
#elif defined(FLASH)
codestart : > BEGIN, PAGE = 0
ramfuncs : LOAD = FLASHC,
RUN = RAMLS1,
RUN_START(_RamfuncsRunStart),
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
PAGE = 0
.text : >> FLASHJ | FLASHK | FLASHL | FLASHN, PAGE = 0
.cinit : > FLASHM, PAGE = 0
.pinit : > FLASHM, PAGE = 0
.switch : > FLASHM, PAGE = 0
.econst : > FLASHB, PAGE = 1
#else
#error Add either "RAM" or "FLASH" to C2000 Linker -> Advanced Options -> Command File Preprocessing -> --define
#endif //RAM
/* Test specific sections */
// RFFTdata1 : > RAMGS45, PAGE = 1//, ALIGN = RFFT_ALIGNMENT
// RFFTdata2 : > RAMGS67, PAGE = 1
// RFFTdata3 : > RAMGS89, PAGE = 1
// RFFTdata4 : > RAMGS1011, PAGE = 1
FPUmathTables : >> RAMGS12|RAMGS13|RAMGS14, PAGE = 0
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */
.cio : > RAMLS3, PAGE = 1
.sysmem : > RAMLS3, PAGE = 1
.stack : > RAMM1, PAGE = 1
.ebss : >> RAMGS1| RAMGS45| RAMGS67 |RAMGS89 |RAMGS1011, PAGE = 1
.econst : > RAMLS3, PAGE = 1
.esysmem : > RAMLS3, PAGE = 1
Filter_RegsFile : > RAMGS1, PAGE = 1
/* CLA specific sections */
Cla1Prog : >> RAMLS4 | RAMLS5, PAGE=0
CLADataLS0 : > RAMLS0, PAGE=1
CLADataLS1 : > RAMLS1, PAGE=1
Cla1ToCpuMsgRAM : > CLA1_MSGRAMLOW, PAGE = 1
CpuToCla1MsgRAM : > CLA1_MSGRAMHIGH, PAGE = 1
/* The following section definition are for SDFM examples */
Filter1_RegsFile : > RAMGS1, PAGE = 1, fill=0x1111
Filter2_RegsFile : > RAMGS2, PAGE = 1, fill=0x2222
Filter3_RegsFile : > RAMGS3, PAGE = 1, fill=0x3333
Filter4_RegsFile : > RAMGS45, PAGE = 1, fill=0x4444
SFRA_F_Data : > RAMGS2, ALIGN = 64, PAGE = 1
SFRA_Data : > RAMGS2, ALIGN = 64, PAGE=1
FPUmathTables : > RAMGS3, PAGE =1
cntl_coeff_RAM : > RAMGS3, PAGE = 1
cntl_var_RAM : > RAMGS2, PAGE = 1
cntl_coeff_RAM2 : > RAMGS3, PAGE = 1
cntl_var_RAM2 : > RAMGS2, PAGE = 1
#ifdef CLA_C
/* CLA C compiler sections */
//
// Must be allocated to memory the CLA has write access to
//
CLAscratch :
{ *.obj(CLAscratch)
. += CLA_SCRATCHPAD_SIZE;
*.obj(CLAscratch_end) } > RAMLS1, PAGE = 1
.scratchpad : > RAMLS1, PAGE = 1
.bss_cla : > RAMLS1, PAGE = 1
.const_cla : > RAMLS1, PAGE = 1
#endif CLA_C
}
/*
//===========================================================================
// End of file.
//===========================================================================
*/
/////////////////////////////////////////////////////////////////////////////
In this link command file, there is no any piece about the ".TI.ramfunc" section ".
How can I do that?
Any suggestion is appreciated.
