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TMS320F28069M: Changing interrupt priority like told in hal_tutorial.pdf does not work

Part Number: TMS320F28069M

Hi,

i am using a TimerInterrupt, a SCI interrupt and  the ADC-Interrupt for the mainISR.

In the hal_tutorial.pdf there is said, that i have to give a higher priority to the ADC interrupt, when using sci. This sounds gread and i want to do this. Actually it doesn't work.

I changed the following code lines:

void HAL_enableAdcInts(HAL_Handle handle)
{
  HAL_Obj *obj = (HAL_Obj *)handle;
  // enable the PIE interrupts associated with the ADC interrupts
  PIE_enableAdcInt(obj->pieHandle,ADC_IntNumber_1HP);
  // enable the ADC interrupts
  ADC_enableInt(obj->adcHandle,ADC_IntNumber_1);
  // enable the cpu interrupt for ADC interrupts
  CPU_enableInt(obj->cpuHandle,CPU_IntNumber_1);
  return;
} // end of HAL_enableAdcInts() function

And the Init vector table

  pie->TINT0 = &timer0ISR;
  pie->ADCINT1_HP = &mainISR;

 pie->SCIRXINTB =&sciBRxISR;

The problem: Main isr is not triggered, th DRV doesn't initialize. At EOC of Channel 7 i trigger another conversion. This also doesn't work.

As my timer also is also enabled to CPU_IntNumber_1 i thought this might be the problem. But also changing the IntNumber of the Timer interrupt doesn't work.

Am i missing sth?  I looked into the manual of the processor and so on but i can't find the problem.

Changing ADC interrupt to IntNumber 1 doesn't work.  Then i Change the IntNumber of the Timer Interrupt to 5 the Timer interrupt doesn'T work.  Is there any other Setting i have to check?

Everything works when sci has intNumber 9 and ADC hat IntNumber10

  • With the above settings you have shown, are you able to enter either the Timer0 or SCI-B RX interrupts?

    Sean
  • You need to change two more things.

    1. Change the interruput acknowledge function in mainISR()

      // acknowledge the ADC interrupt
      HAL_acqAdcInt(halHandle,ADC_IntNumber_1);

    2. Change HAL_acqAdcInt() in hal.h file as following

    static inline void HAL_acqAdcInt(HAL_Handle handle,const ADC_IntNumber_e intNumber)
    {
      HAL_Obj *obj = (HAL_Obj *)handle;


      // clear the ADC interrupt flag
      ADC_clearIntFlag(obj->adcHandle,intNumber);


      // Acknowledge interrupt from PIE group 1
      PIE_clearInt(obj->pieHandle,PIE_GroupNumber_1);

      return;
    } // end of HAL_acqAdcInt() function

    Regards,

    Steve

  • Hey, thank you very much. Did i unterstand correctly, that i can assign any interrupt to any interrupt number? Does the PIE_Group number debend on the interrupt number or on the hardware-port where the module is connected?
    Thanks!
  • If I'm understanding your question correctly, no, the interrupt numbers are not changable. Timer 0 interrupt can not be triggered by Timer 1 by changing a setting, and as a result, Timer 0 will only trigger Timer 0 ISR for the specific PIE Table entry that it has been assigned to.

    Sean
  • Hi,
    thank you very much for the reply! Sorry for not replying it was a stresful week.
    What you said is totally clear to me. My question was about the assignment of the peripherals interrupts. If i understood the mux correctly, I have my peripheral interrupt signals and CPU interrupt numbers. And i can assign any peripheral to any Cpu interrupt number. But actually I don't really understand where exactly this assignment happens. Also Im doing bad in understanding the Interrupt groups.
    Now all my Interrupts are running but ADC and the Timer module are both on CPUintNumber1. But the ADC is "HP". What i wanted to do is to give the main ISR the highest priority. The Timer and SCI should have lower priorities.
    I think its totally easy to understand but im missing any link.
    Following i will show you how i setup the interrupts now. What i don't like that ADC and Timer are both on CPUIntNumber1. Can this cause a problem?

    Setup in Main:
    // initialize the interrupt vector table
    HAL_initIntVectorTable(halHandle);
    // enable the ADC interrupts
    HAL_enableAdcInts(halHandle);
    // enable the SCIB interrupts
    HAL_enableSciInts(halHandle);
    // enable global interrupts
    HAL_enableGlobalInts(halHandle);
    // disable the PWM
    HAL_disablePwm(halHandle);
    // enable Timer0Interrupt , occurs every 10ms
    HAL_enableTimer0Int(halHandle);

    static inline void HAL_initIntVectorTable(HAL_Handle handle)
    {
    HAL_Obj *obj = (HAL_Obj *)handle;
    PIE_Obj *pie = (PIE_Obj *)obj->pieHandle;
    ENABLE_PROTECTED_REGISTER_WRITE_MODE;
    pie->TINT0 = &timer0ISR;
    pie->ADCINT1_HP = &mainISR;
    pie->SCIRXINTB =&sciBRxISR;
    DISABLE_PROTECTED_REGISTER_WRITE_MODE;

    return;
    } // end of HAL_initIntVectorTable() function

    void HAL_enableAdcInts(HAL_Handle handle)
    {
    HAL_Obj *obj = (HAL_Obj *)handle;
    // enable the PIE interrupts associated with the ADC interrupts
    PIE_enableAdcInt(obj->pieHandle,ADC_IntNumber_1HP);
    // enable the ADC interrupts
    ADC_enableInt(obj->adcHandle,ADC_IntNumber_1);
    // enable the cpu interrupt for ADC interrupts
    CPU_enableInt(obj->cpuHandle,CPU_IntNumber_1);
    return;
    } // end of HAL_enableAdcInts() function

    void HAL_enableSciInts(HAL_Handle handle)
    {
    HAL_Obj *obj = (HAL_Obj *)handle;
    // enable the PIE interrupts associated with the SCI interrupts
    // enable SCIB RX interrupt in PIE
    PIE_enableInt(obj->pieHandle,PIE_GroupNumber_9,PIE_InterruptSource_SCIBRX);
    // enable SCI RX interrupts
    // enable SCIB RX interrupt
    SCI_enableRxInt(obj->sciBHandle);
    // enable the cpu interrupt for SCI interrupts
    CPU_enableInt(obj->cpuHandle,CPU_IntNumber_9);
    } // end of HAL_enableSciInts() function

    void HAL_enableTimer0Int(HAL_Handle handle)
    {
    HAL_Obj *obj = (HAL_Obj *)handle;
    PIE_enableTimer0Int(obj->pieHandle);
    // enable the interrupt
    TIMER_enableInt(obj->timerHandle[0]);
    // enable the cpu interrupt for TINT0
    CPU_enableInt(obj->cpuHandle,CPU_IntNumber_1);
    return;
    } // end of HAL_enablePwmInt() function

    If you can see, both Timer0 and ADC are assigned to CPU_IntNumber_1...am i right with this? Actually it works fine like this.
  • Take a look at page 173 of this document: www.ti.com/.../spruh18f.pdf

    You'll see that the PIE table is separated in rows and columns. While it is true that ADCINT1 and TINT0 are both on the same row (CPU IntNumber 1), ADCINT1 is in the highest priority column, denoted by INTx.1. For any INTx.y, interrupts with a lesser value of 'y' and equal or lesser value of 'x' are serviced first. As a result, INT1.1 (ADCINT1) will be serviced before INT1.7 (TINT0)

    Hope that clears things up

    Sean
  • Thank you! Yes that was the part i wasn't sure about how to understand that. But now with your explanation its clear to me. Thank you!!!
    Best Regards

    Sebastian