Tool/software: Code Composer Studio
Dear all,
my program goes to illegal_isr after I added CLA code.
everything is fine without this code. However, if I add this code, program stops. before for(;;) loop in main,
PieCtrlRegs.PIEIER1.bit.INTx4 = 1;
PieCtrlRegs.PIEIER1.bit.INTx5 = 1;
PieCtrlRegs.PIEIER3.bit.INTx1 = 1;
IER |= M_INT1;
IER |= M_INT3;
IER |= M_INT12;
Also, if I add this code in for(;;) program stops instantly with illegal_isr
EALLOW;
EPwm1Regs.TBPRD = EPWM1_TBPRD;
EPwm2Regs.TBPRD = EPWM1_TBPRD;
EPwm2Regs.TBPHS.bit.TBPHS = EPWM2_TBPHS;
EPwm7Regs.TBPRD = EPWM7_TBPRD;
EPwm1Regs.DBRED.bit.DBRED = EPWM1_DB;
EPwm1Regs.DBFED.bit.DBFED = EPWM1_DB;
EPwm2Regs.DBRED.bit.DBRED = EPWM2_DB;
EPwm2Regs.DBFED.bit.DBFED = EPWM2_DB;
EPwm3Regs.DBRED.bit.DBRED = EPWM3_DB;
EPwm3Regs.DBFED.bit.DBFED = EPWM3_DB;
EDIS;
I tried
1. ram memory allocation because someone says its because of ram memory.
2. I set the breakpoint on the first statement of main(), and run. seems fine, but program stops with illegal isr in the first statement of for(;;) loop
3. I searched several examples: epwm, gpio, adc, timer, cla, since I use all. some examples(epwm) edit PieCtrlRegs after enabling global interrupt, and rest of them are not. it makes me confusing, but I don't think it's the reason of this problem.
Also, Clatasks doesn't work if I remove 'Cla1ForceTaskxandWait();' is there any setting that I have to do to run cla task with epwm trigger except setting "CLA1TASKSRCSEL1"? as CLA_TRIG_EPWM1INT?
I attached main.c. any suggestion is welcome, and thank you in advance.
#include "F28x_Project.h"
//#include "easy2837xS_sci_v8.5.h"
#include "F2837xS_device.h"
#include "cla_test.h"
//#include "SFO_V8.h"
void init_param(void);
void update_param(void);
void init_7_segment(void);
void Configure_HW_Fault_Pin(void);
__interrupt void cpu_timer0_isr(void);
#define STATUS_SUCCESS 1
#define STATUS_FAIL 0
Uint16 status;
int MEP_ScaleFactor;
void error(void);
void cla_Init(void);
__interrupt void cla1Isr1();
__interrupt void cla1Isr8();
#pragma DATA_SECTION(cla_task1_cnt, "Cla1ToCpuMsgRAM");
uint32_t cla_task1_cnt;
uint16_t cla_cnt;
void main(void){
InitSysCtrl();
InitEPwm1Gpio();
InitEPwm2Gpio();
DINT;
InitPieCtrl();
IER = 0x0000;
IFR = 0x0000;
InitPieVectTable();
InitGpio();
Configure_LED_GPIO();
ConfigureADC();
init_param();
Configure_PWM_EN_GPIO();
EALLOW;
// Pin Configuration for LED
GpioCtrlRegs.GPAGMUX2.bit.GPIO31 = 0;
GpioCtrlRegs.GPAMUX2.bit.GPIO31 = 0;
GpioCtrlRegs.GPBGMUX1.bit.GPIO34 = 0;
GpioCtrlRegs.GPBMUX1.bit.GPIO34 = 0;
// GPIO Direction Configuration(OUTPUT)
GpioCtrlRegs.GPADIR.bit.GPIO31 = 1;
GpioCtrlRegs.GPBDIR.bit.GPIO34 = 1;
// GPIO Output Initialization
GpioDataRegs.GPADAT.bit.GPIO31 = 0;
// GPIO Controller Configuration (CPU1)
GpioCtrlRegs.GPACSEL4.bit.GPIO31 = 0; // Toggle GPIO31 by CPU1
GpioCtrlRegs.GPBCSEL1.bit.GPIO34 = 1; // Toggle GPIO34 by CPU1
EDIS;
EALLOW;
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 0; // Stop all the TB clocks
EDIS;
ConfigureEPWM1();
ConfigureEPWM2();
ConfigureEPWM3();
InitCpuTimers();
ConfigCpuTimer(&CpuTimer0, 200, 200);
CpuTimer0Regs.TCR.all = 0x4000;
//init_7_segment();
Configure_HW_Fault_Pin();
cla_Init();
//Cla1ForceTask1andWait();
//Cla1ForceTask8andWait();
//IER |= M_INT1; //Enable group 1 interrupts (xint1 and 2)
//IER |= M_INT3; //Enable group 3 interrupts (epwm1)
//IER |= M_INT12; // Enable group 12 interrupts (xint3, 4, 5)
EALLOW;
PieVectTable.TIMER0_INT = &cpu_timer0_isr;
PieVectTable.EPWM1_INT = ¤t_controller;
PieVectTable.XINT1_INT = &hw_fault1;
PieVectTable.XINT2_INT = &hw_fault2;
EDIS;
PieCtrlRegs.PIEIER1.bit.INTx7 = 1; // PIE1.7 - TIMER 0
//PieCtrlRegs.PIEIER1.bit.INTx4 = 1; // PIE1.4 - XINT1
//PieCtrlRegs.PIEIER1.bit.INTx5 = 1; // PIE1.5 - XINT2
PieCtrlRegs.PIEIER3.bit.INTx1 = 1; // PIE3.1 - EPWM1
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM
EALLOW;
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 1; // Stop all the TB clocks
IER |= M_INT3; //Enable group 3 interrupts (epwm1)
EDIS;
for(;;){
//asm(" NOP");
DELAY_US(50000L);
GpioDataRegs.GPATOGGLE.bit.GPIO31 = 1;
Cla1ForceTask1andWait();
Cla1ForceTask8andWait();
//update_param();
}
}
__interrupt void cla1Isr1 ()
{
cla_cnt++;
//GpioDataRegs.GPATOGGLE.bit.GPIO31 = 1;
PieCtrlRegs.PIEACK.all = PIEACK_GROUP11; // Acknowledge interrupt to PIE
}
__interrupt void cla1Isr8 ()
{
if(cla_cnt >= 50000){
GPIO_WritePin(31,1);
cla_cnt = 0;
}
PieCtrlRegs.PIEACK.all = PIEACK_GROUP11; // Acknowledge interrupt to PIE
}
//============================================================================================
void cla_Init(void){
EALLOW;
MemCfgRegs.MSGxINIT.bit.INIT_CLA1TOCPU = 1;
while(MemCfgRegs.MSGxINITDONE.bit.INITDONE_CLA1TOCPU != 1){};
MemCfgRegs.MSGxINIT.bit.INIT_CPUTOCLA1 = 1;
while(MemCfgRegs.MSGxINITDONE.bit.INITDONE_CPUTOCLA1 != 1){};
MemCfgRegs.LSxMSEL.bit.MSEL_LS4 = 1;
MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS4 = 1;
MemCfgRegs.LSxMSEL.bit.MSEL_LS5 = 1;
MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS5 = 1;
MemCfgRegs.LSxMSEL.bit.MSEL_LS0 = 1;
MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS0 = 0;
MemCfgRegs.LSxMSEL.bit.MSEL_LS1 = 1;
MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS1 = 0;
EDIS;
EALLOW;
Cla1Regs.MVECT1 = (uint16_t)(&Cla1Task1);
Cla1Regs.MVECT8 = (uint16_t)(&Cla1Task8);
Cla1Regs.MCTL.bit.IACKE = CLA_IACK_ENABLE;
Cla1Regs.MIER.all = (M_INT1 | M_INT8);
PieVectTable.CLA1_1_INT = &cla1Isr1;
PieVectTable.CLA1_8_INT = &cla1Isr8;
DmaClaSrcSelRegs.CLA1TASKSRCSEL1.bit.TASK1 = CLA_TRIG_EPWM1INT;
DmaClaSrcSelRegs.CLA1TASKSRCSEL2.bit.TASK8 = CLA_TRIG_EPWM2INT;
PieCtrlRegs.PIEIER11.bit.INTx1 = 1; // Enable INT 11.1 in the PIE (CLA Task1)
PieCtrlRegs.PIEIER11.bit.INTx8 = 1;
IER |= M_INT11;
Cla1ForceTask8andWait();
EDIS;
}
void init_param(void){
float a = 0.;
fsw = 59e3;
Tsamp = 1/fsw;
EPWM1_TBPRD = (Uint16)((180.E6*Tsamp)/2);
EPWM2_TBPHS = (Uint16) EPWM1_TBPRD;
EPWM7_TBPRD = EPWM1_TBPRD*1000;
EPWM1_DB = 15;
EPWM2_DB = 15;
EPWM3_DB = 15;
EALLOW;
EPwm1Regs.TBPRD = EPWM1_TBPRD;
EPwm2Regs.TBPRD = EPWM1_TBPRD;
EPwm2Regs.TBPHS.bit.TBPHS = (Uint16) EPWM1_TBPRD;
EPwm7Regs.TBPRD = EPWM7_TBPRD;
EPwm1Regs.DBRED.bit.DBRED = EPWM1_DB;
EPwm1Regs.DBFED.bit.DBFED = EPWM1_DB;
EPwm2Regs.DBRED.bit.DBRED = EPWM2_DB;
EPwm2Regs.DBFED.bit.DBFED = EPWM2_DB;
EPwm3Regs.DBRED.bit.DBRED = EPWM3_DB;
EPwm3Regs.DBFED.bit.DBFED = EPWM3_DB;
EDIS;
Ltx = 100e-6;
Rtx = 0.1;
w_cc = TWO_PI*100;
Kp_cc = w_cc*Ltx;
Ki_cc = w_cc*Rtx;
Ka_cc = 1/Kp_cc;
Vtx_cmd = 0.;
Vtx_cmd_sat = 0.;
Vtx_cmd_integ = 0.;
Itx_Phase_Flt_Cutoff_Freq = 20*TWO_PI;
Itx_Cmd_Flt_Cutoff_Freq = 0.5*TWO_PI;
Vdc_tx_Flt_Cutoff_Freq = 10*TWO_PI;
Vdc_rx_Flt_Cutoff_Freq = 10*TWO_PI;
Itx_mag_Flt_Cutoff_Freq = 10*TWO_PI;
INIT_LPF1(Itx_Phase_Flt_Cutoff_Freq, Tsamp, IDX_ITX_PHASE_FLT);
INIT_LPF1(Itx_Cmd_Flt_Cutoff_Freq, Tsamp, IDX_ITX_CMD_FLT);
INIT_LPF1(Vdc_tx_Flt_Cutoff_Freq, Tsamp, IDX_VDC_TX_FLT);
INIT_LPF1(Vdc_rx_Flt_Cutoff_Freq, Tsamp, IDX_VDC_RX_FLT);
INIT_LPF1(Itx_mag_Flt_Cutoff_Freq, Tsamp, IDX_ITX_MAG_FLT);
}
void update_param(void){
// float a = 0.f;
Tsamp = 1/fsw;
EPWM1_TBPRD = (Uint16) (180.E6*Tsamp)/2; //PERIOD
EPWM7_TBPRD = (Uint16) EPWM1_TBPRD*1000; //ADC
EALLOW;
EPwm1Regs.TBPRD = EPWM1_TBPRD;
EPwm2Regs.TBPRD = EPWM1_TBPRD;
EPwm2Regs.TBPHS.bit.TBPHS = EPWM2_TBPHS;
EPwm7Regs.TBPRD = EPWM7_TBPRD;
EPwm1Regs.DBRED.bit.DBRED = EPWM1_DB;
EPwm1Regs.DBFED.bit.DBFED = EPWM1_DB;
EPwm2Regs.DBRED.bit.DBRED = EPWM2_DB;
EPwm2Regs.DBFED.bit.DBFED = EPWM2_DB;
EPwm3Regs.DBRED.bit.DBRED = EPWM3_DB;
EPwm3Regs.DBFED.bit.DBFED = EPWM3_DB;
EDIS;
Kp_cc = w_cc*Ltx;
Ki_cc = w_cc*Rtx;
Ka_cc = 1/Kp_cc;
}
/*
void init_7_segment(void){
GPIO_WritePin(71, 1);
GPIO_WritePin(74, 1);
GPIO_WritePin(77, 1);
GPIO_WritePin(80, 1);
GPIO_WritePin(81, 1);
GPIO_WritePin(83, 1);
GPIO_WritePin(86, 1);
GPIO_WritePin(87, 1);
}
*/
void Configure_HW_Fault_Pin(void){
EALLOW;
InputXbarRegs.INPUT4SELECT = 47; // Highest PRIORITY FAULT INTERRUPT
InputXbarRegs.INPUT5SELECT = 50; // Highest PRIORITY FAULT INTERRUPT
InputXbarRegs.INPUT6SELECT = 53; // Lowest PRIORITY FAULT INTERRUPT
InputXbarRegs.INPUT13SELECT = 56; // Lowest PRIORITY FAULT INTERRUPT
InputXbarRegs.INPUT14SELECT = 59; // Lowest PRIOIRTY FAULT INTERRUPT
XintRegs.XINT1CR.bit.POLARITY = 0;
XintRegs.XINT2CR.bit.POLARITY = 0;
XintRegs.XINT3CR.bit.POLARITY = 0;
XintRegs.XINT4CR.bit.POLARITY = 0;
XintRegs.XINT5CR.bit.POLARITY = 0;
XintRegs.XINT1CR.bit.ENABLE = 1;
XintRegs.XINT2CR.bit.ENABLE = 1;
XintRegs.XINT3CR.bit.ENABLE = 1;
XintRegs.XINT4CR.bit.ENABLE = 1;
XintRegs.XINT5CR.bit.ENABLE = 1;
EDIS;
}
__interrupt void cpu_timer0_isr(void)
{
CpuTimer0.InterruptCount++;
if(FLAG_HW_FAULT){
FLAG_PWM_ENABLE = 0;
switch(FLAG_HW_FAULT){
case 1:
if (CpuTimer0.InterruptCount > 2000){
GPIO_WritePin(77, 0);
GPIO_WritePin(81, 0);
GPIO_WritePin(83, 0);
GPIO_WritePin(86, 0);
GPIO_WritePin(74, 1);
}
if (CpuTimer0.InterruptCount > 4000){
CpuTimer0.InterruptCount = 0;
GPIO_WritePin(74, 0);
GPIO_WritePin(77, 0);
GPIO_WritePin(81, 1);
GPIO_WritePin(83, 1);
GPIO_WritePin(86, 1);
}
case 2:
if (CpuTimer0.InterruptCount > 2000){
GPIO_WritePin(77, 0);
GPIO_WritePin(81, 0);
GPIO_WritePin(83, 0);
GPIO_WritePin(86, 0);
GPIO_WritePin(71, 1);
GPIO_WritePin(74, 1);
GPIO_WritePin(80, 1);
}
if (CpuTimer0.InterruptCount > 4000){
CpuTimer0.InterruptCount = 0;
GPIO_WritePin(71, 0);
GPIO_WritePin(74, 0);
GPIO_WritePin(80, 0);
GPIO_WritePin(81, 0);
GPIO_WritePin(86, 0);
GPIO_WritePin(77, 1);
GPIO_WritePin(83, 1);
}
case 3:
if (CpuTimer0.InterruptCount > 2000){
GPIO_WritePin(77, 0);
GPIO_WritePin(81, 0);
GPIO_WritePin(83, 0);
GPIO_WritePin(86, 0);
GPIO_WritePin(71, 1);
GPIO_WritePin(74, 1);
GPIO_WritePin(80, 1);
}
if (CpuTimer0.InterruptCount > 4000){
CpuTimer0.InterruptCount = 0;
GPIO_WritePin(71, 0);
GPIO_WritePin(74, 0);
GPIO_WritePin(77, 0);
GPIO_WritePin(80, 0);
GPIO_WritePin(86, 0);
GPIO_WritePin(81, 1);
GPIO_WritePin(83, 1);
}
case 4:
if (CpuTimer0.InterruptCount > 2000){
GPIO_WritePin(77, 0);
GPIO_WritePin(81, 0);
GPIO_WritePin(83, 0);
GPIO_WritePin(86, 0);
GPIO_WritePin(74, 1);
}
if (CpuTimer0.InterruptCount > 4000){
CpuTimer0.InterruptCount = 0;
GPIO_WritePin(74, 0);
GPIO_WritePin(77, 0);
GPIO_WritePin(86, 0);
GPIO_WritePin(83, 0);
GPIO_WritePin(81, 1);
}
case 5:
if (CpuTimer0.InterruptCount > 2000){
GPIO_WritePin(77, 0);
GPIO_WritePin(81, 0);
GPIO_WritePin(83, 0);
GPIO_WritePin(86, 0);
GPIO_WritePin(71, 1);
GPIO_WritePin(80, 1);
}
if (CpuTimer0.InterruptCount > 4000){
CpuTimer0.InterruptCount = 0;
GPIO_WritePin(71, 0);
GPIO_WritePin(77, 0);
GPIO_WritePin(80, 0);
GPIO_WritePin(83, 0);
GPIO_WritePin(86, 0);
GPIO_WritePin(81, 1);
}
}
}
if(FLAG_SW_FAULT){
FLAG_PWM_ENABLE = 0;
switch(FLAG_SW_FAULT){
case 1:
if (CpuTimer0.InterruptCount > 2000){
GPIO_WritePin(71, 0);
GPIO_WritePin(77, 0);
GPIO_WritePin(80, 0);
GPIO_WritePin(83, 0);
GPIO_WritePin(86, 0);
GPIO_WritePin(87, 0);
GPIO_WritePin(74, 1);
}
if (CpuTimer0.InterruptCount > 4000){
CpuTimer0.InterruptCount = 0;
GPIO_WritePin(74, 0);
GPIO_WritePin(77, 0);
GPIO_WritePin(71, 1);
GPIO_WritePin(80, 1);
GPIO_WritePin(83, 1);
GPIO_WritePin(86, 1);
GPIO_WritePin(87, 1);
}
case 2:
if (CpuTimer0.InterruptCount > 2000){
GPIO_WritePin(71, 0);
GPIO_WritePin(77, 0);
GPIO_WritePin(80, 0);
GPIO_WritePin(83, 0);
GPIO_WritePin(86, 0);
GPIO_WritePin(87, 0);
GPIO_WritePin(74, 1);
GPIO_WritePin(81, 1);
}
if (CpuTimer0.InterruptCount > 4000){
CpuTimer0.InterruptCount = 0;
GPIO_WritePin(71, 0);
GPIO_WritePin(74, 0);
GPIO_WritePin(80, 0);
GPIO_WritePin(81, 0);
GPIO_WritePin(86, 0);
GPIO_WritePin(77, 1);
GPIO_WritePin(83, 1);
GPIO_WritePin(87, 1);
}
case 3:
if (CpuTimer0.InterruptCount > 2000){
GPIO_WritePin(71, 0);
GPIO_WritePin(77, 0);
GPIO_WritePin(80, 0);
GPIO_WritePin(83, 0);
GPIO_WritePin(86, 0);
GPIO_WritePin(87, 0);
GPIO_WritePin(74, 1);
}
if (CpuTimer0.InterruptCount > 4000){
CpuTimer0.InterruptCount = 0;
GPIO_WritePin(71, 0);
GPIO_WritePin(74, 0);
GPIO_WritePin(80, 0);
GPIO_WritePin(77, 0);
GPIO_WritePin(86, 0);
GPIO_WritePin(77, 1);
GPIO_WritePin(87, 1);
}
case 4:
if (CpuTimer0.InterruptCount > 2000){
GPIO_WritePin(71, 0);
GPIO_WritePin(77, 0);
GPIO_WritePin(80, 0);
GPIO_WritePin(83, 0);
GPIO_WritePin(86, 0);
GPIO_WritePin(87, 0);
GPIO_WritePin(74, 1);
GPIO_WritePin(81, 1);
}
if (CpuTimer0.InterruptCount > 4000){
CpuTimer0.InterruptCount = 0;
GPIO_WritePin(74, 0);
GPIO_WritePin(77, 0);
GPIO_WritePin(81, 0);
GPIO_WritePin(86, 0);
GPIO_WritePin(71, 1);
GPIO_WritePin(80, 1);
GPIO_WritePin(83, 1);
GPIO_WritePin(87, 1);
}
}
}
if (!FLAG_SW_FAULT && !FLAG_HW_FAULT){
EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN;
EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN;
EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN;
if (CpuTimer0.InterruptCount > 2000){
GPIO_WritePin(31, 1);
GPIO_WritePin(34, 0);
GPIO_WritePin(71, 1);
GPIO_WritePin(77, 1);
GPIO_WritePin(80, 1);
GPIO_WritePin(83, 1);
GPIO_WritePin(86, 1);
GPIO_WritePin(87, 1);
GPIO_WritePin(74, 1);
GPIO_WritePin(81, 1);
}
if (CpuTimer0.InterruptCount > 4000){
CpuTimer0.InterruptCount = 0;
GPIO_WritePin(31, 0);
GPIO_WritePin(34, 1);
GPIO_WritePin(71, 1);
GPIO_WritePin(77, 1);
GPIO_WritePin(80, 1);
GPIO_WritePin(83, 1);
GPIO_WritePin(86, 1);
GPIO_WritePin(87, 1);
GPIO_WritePin(74, 1);
GPIO_WritePin(81, 1);
}
}
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
}
void error (void)
{
__asm(" ESTOP0"); // Stop here and handle error
}