TMS320F28377D: how to handle 10 bit uart

Hi Carlo,

What is the desired baud rate?

Parity is configurable as odd or even, so I think when sending you could calculate which parity mode will give the correct 10th sent bit? This won't be efficient, but is probably better than bit-banging.

If parity is enabled, the SCI will receive 10 bits. You can then calculate the parity and check against the parity error flag to determine what the last bit that was received in the parity slot.

Hi,
I asked Carlo for this mode.
I need a 2Mbit com at 10bits

Fortunately I can use a dedicated core (I have a TMS320F28374D) for this task.....

TX is not a problem; bit9 is controlled using the TXWAKE bit in ADDR MODE and I have an algorithm to estimate the parity and change the parity flag to force the 10th bit as I want.

The problem is about RX
What I found is that the PE flag can be reset only by a SW reset or a SCI Reset.
This event resets the SCI state machine and this leads to a missing detection of the next byte.


I was able to find a workaround enabling the FIFO and using bit 14 of the RXBUFREG (PE); it seems to clear itself after reading the register.

Is it correct?
Are there alternative solutions?

P.S.
FIFO seems not able to keep also the RXWAKE flag and PE; I mean, if I received 3 bytes and I read the FIFO, the RXWAKE and PE are always referred to the first element. Is it correct?


Regards
Emanuele

Hi Emanuele,

Based on my understanding:

SCIRXST.PE parity error flag is only reset by a module reset, so, as you said, this is probably not going to be helpful unless there is significant time between incoming message.

SCIRXBUF.SCIFFPE is the parity error for whatever is on top of the receive FIFO and SCIRXST.RXWAKE is the address bit for whatever is on top of the FIFO.  My reading of these bits is that the FIFO does actually store the address and parity bit.  I think what you need to do here is:

For each item in the receive FIFO:

• Read the SCIRXST.RXWAKE bit.   
• Read the full 16 bits of the SCIRXBUF register.
  • Note: this will automatically load RXWAKE and SCIRXBUF with the next value in the FIFO
• Assemble your received 10-bits, where bits 0-7 of the SCIRXBUF are bits 0-7 of the message, SCIRXBUF bit 14 is bit 8, and the RXWAKE bit is bit 9. 

Since reading the SCIRXBUF loads the next value into RXWAKE, reading RXWAKE needs to be done before reading SCIRXBUF.