Part Number: LAUNCHXL-F28379D
Other Parts Discussed in Thread: C2000WARE
Tool/software: Code Composer Studio
Hello,
I intend to transfer “freq" variables to the SCI port int the “2837x_rfft_adc_rt” example, but there is an error when compiling:
**** Build of configuration RAM for project 2837x_RFFT_ADC_RT **** "C:\\ti\\ccsv6\\utils\\bin\\gmake" -k all 'Building target: 2837x_RFFT_ADC_RT.out' 'Invoking: C2000 Linker' "C:/ti/ccsv6/tools/compiler/ti-cgt-c2000_6.4.6/bin/cl2000" -v28 -ml -mt --float_support=fpu32 -g --define=CPU1 --define=ADCA --diag_warning=225 -z -m"2837x_RFFT_ADC_RT.map" --stack_size=0x300 --warn_sections -i"C:/ti/ccsv6/tools/compiler/ti-cgt-c2000_6.4.6/lib" -i"C:/ti/ccsv6/tools/compiler/ti-cgt-c2000_6.4.6/include" -i"C:/ti/c2000/C2000Ware_1_00_00_00/libraries/dsp/FPU/c28/lib" --reread_libs --define=RAM --xml_link_info="2837x_RFFT_ADC_RT_linkInfo.xml" --entry_point=code_start --rom_model -o "2837x_RFFT_ADC_RT.out" "./F2837xD_Adc.obj" "./F2837xD_CodeStartBranch.obj" "./F2837xD_DefaultISR.obj" "./F2837xD_EPwm.obj" "./F2837xD_GlobalVariableDefs.obj" "./F2837xD_Gpio.obj" "./F2837xD_PieCtrl.obj" "./F2837xD_PieVect.obj" "./F2837xD_Sci.obj" "./F2837xD_SysCtrl.obj" "./F2837xD_usDelay.obj" "./examples_setup.obj" "./main.obj" "./sci_io.obj" "C:/ti/c2000/C2000Ware_1_00_00_00/libraries/dsp/FPU/c28/cmd/F2837xD_FPU_RFFT_ADC_RT_lnk.cmd" "C:/ti/c2000/C2000Ware_1_00_00_00/device_support/f2837xd/headers/cmd/F2837xD_Headers_nonBIOS_cpu1.cmd" -l"rts2800_fpu32.lib" -l"c28x_fpu_dsp_library.lib" <Linking> warning: creating output section ".TI.ramfunc" without a SECTIONS specification "C:/ti/c2000/C2000Ware_1_00_00_00/libraries/dsp/FPU/c28/cmd/F2837xD_FPU_RFFT_ADC_RT_lnk.cmd", line 125: error: program will not fit into available memory. placement with alignment/blocking fails for section ".text" size 0x25de page 0. Available memory ranges: RAMM1 size: 0x400 unused: 0x1 max hole: 0x1 RAMD0 size: 0x800 unused: 0x0 max hole: 0x0 RAMD1 size: 0x800 unused: 0x3 max hole: 0x3 >> Compilation failure RAMLS0 size: 0x800 unused: 0x21e max hole: 0x21e "C:/ti/c2000/C2000Ware_1_00_00_00/libraries/dsp/FPU/c28/cmd/F2837xD_FPU_RFFT_ADC_RT_lnk.cmd", line 170: error: program will not fit into available memory. run placement with alignment/blocking fails for section ".stack" size 0x300 page 1. Available memory ranges: RAMLS4_5 size: 0x1000 unused: 0x290 max hole: 0x290 warning: entry-point symbol other than "_c_int00" specified: "code_start" error: errors encountered during linking; "2837x_RFFT_ADC_RT.out" not built gmake: *** [2837x_RFFT_ADC_RT.out] Error 1 gmake: Target `all' not remade because of errors. **** Build Finished ****
main.c code:
...
freq = RFFTmagBuff[1]; for(i=2;i<RFFT_SIZE/2+1;i++){ //Looking for the maximum component of frequency spectrum if(RFFTmagBuff[i] > freq){ j = i; freq = RFFTmagBuff[i]; } } //Converting normalized digital frequency to real analog frequency //f = m * fs/N // where m is the bin with the maximum value, fs the sampling // frequency and N the number of points in the FFT freq = F_PER_SAMPLE * (float)j; sprintf(msg, "%f\n", freq);//<-------------- scia_msg(msg);//<---------------------------
cmd file:
--define RFFT_ALIGNMENT=1024
#if !defined(RFFT_ALIGNMENT)
#error define RFFT_ALIGNMENT under C2000 Linker -> Advanced Options -> Command File Preprocessing -> --define
#endif
MEMORY
{
PAGE 0 :
/* BEGIN is used for the "boot to SARAM" bootloader mode */
#if defined(RAM)
BEGIN : origin = 0x000000, length = 0x000002
#elif defined(FLASH)
BEGIN : origin = 0x080000, length = 0x000002
#endif
RAMM0 : origin = 0x000122, length = 0x0002DE
RAMM1 : origin = 0x000400, length = 0x000400
RAMD0 : origin = 0x00B000, length = 0x000800
RAMD1 : origin = 0x00B800, length = 0x000800
RAMLS0 : origin = 0x008000, length = 0x000800
RAMLS1 : origin = 0x008800, length = 0x000800
RAMLS2 : origin = 0x009000, length = 0x000800
RAMGS0 : origin = 0x00C000, length = 0x001000
RAMGS1 : origin = 0x00D000, length = 0x001000
RAMGS2 : origin = 0x00E000, length = 0x001000
RAMGS3 : origin = 0x00F000, length = 0x001000
RESET : origin = 0x3FFFC0, length = 0x000002
FLASHA : origin = 0x080002, length = 0x001FFE /* on-chip Flash */
FLASHC : origin = 0x084000, length = 0x002000 /* on-chip Flash */
FLASHD : origin = 0x086000, length = 0x002000 /* on-chip Flash */
FLASHE : origin = 0x088000, length = 0x008000 /* on-chip Flash */
FLASHF : origin = 0x090000, length = 0x008000 /* on-chip Flash */
FLASHG : origin = 0x098000, length = 0x008000 /* on-chip Flash */
FLASHH : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */
FLASHI : origin = 0x0A8000, length = 0x008000 /* on-chip Flash */
FLASHJ : origin = 0x0B0000, length = 0x008000 /* on-chip Flash */
FLASHK : origin = 0x0B8000, length = 0x002000 /* on-chip Flash */
FLASHL : origin = 0x0BA000, length = 0x002000 /* on-chip Flash */
FLASHM : origin = 0x0BC000, length = 0x002000 /* on-chip Flash */
FLASHN : origin = 0x0BE000, length = 0x002000 /* on-chip Flash */
PAGE 1 :
BOOT_RSVD : origin = 0x000002, length = 0x000120 /* Part of M0, BOOT rom will use this for stack */
RAMLS3 : origin = 0x009800, length = 0x000800
//RAMLS4 : origin = 0x00A000, length = 0x000800
//RAMLS5 : origin = 0x00A800, length = 0x000800
RAMLS4_5 : origin = 0x00A000, length = 0x001000//<------------------------------new
RAMGS45 : origin = 0x010000, length = 0x002000
RAMGS67 : origin = 0x012000, length = 0x002000
RAMGS89 : origin = 0x014000, length = 0x002000
RAMGS1011 : origin = 0x016000, length = 0x002000
RAMGS12 : origin = 0x018000, length = 0x001000
RAMGS13 : origin = 0x019000, length = 0x001000
RAMGS14 : origin = 0x01A000, length = 0x001000
RAMGS15 : origin = 0x01B000, length = 0x001000
FLASHB : origin = 0x082000, length = 0x002000 /* on-chip Flash */
}
SECTIONS
{
codestart : > BEGIN, PAGE = 0
#if defined(RAM)
ramfuncs : > RAMM0, PAGE = 0
.text :>> RAMM1 | RAMD0 | RAMD1 | RAMLS0, PAGE = 0
.cinit : > RAMLS1, PAGE = 0
.pinit : > RAMLS1, PAGE = 0
.switch : > RAMLS1, PAGE = 0
//.econst : > RAMLS4, PAGE = 1
.econst : > RAMLS4_5, PAGE = 1//<------------------------------new
#elif defined(FLASH)
ramfuncs : LOAD = FLASHC,
RUN = RAMLS1,
RUN_START(_RamfuncsRunStart),
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
PAGE = 0
.text : > FLASHN, PAGE = 0
.cinit : > FLASHM, PAGE = 0
.pinit : > FLASHM, PAGE = 0
.switch : > FLASHM, PAGE = 0
.econst : > FLASHB, PAGE = 1
#else
#error Add either "RAM" or "FLASH" to C2000 Linker -> Advanced Options -> Command File Preprocessing -> --define
#endif //RAM
/* Test specific sections */
RFFTdata1 : > RAMGS45, PAGE = 1, ALIGN = RFFT_ALIGNMENT
RFFTdata2 : > RAMGS67, PAGE = 1
RFFTdata3 : > RAMGS89, PAGE = 1
RFFTdata4 : > RAMGS1011, PAGE = 1
FPUmathTables : > RAMGS12, PAGE = 1
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */
.cio : > RAMLS3, PAGE = 1
.sysmem : > RAMLS3, PAGE = 1
// .stack : > RAMLS4, PAGE = 1
// .ebss : > RAMLS5, PAGE = 1
// .esysmem : > RAMLS4, PAGE = 1
.stack : > RAMLS4_5, PAGE = 1//<------------------------------new
.ebss : > RAMLS4_5, PAGE = 1//<------------------------------new
.esysmem : > RAMLS4_5, PAGE = 1//<------------------------------new
}
Thenks for your help.
Regards,
Amin
