TMS320F28235: Questions of CAN module.

Hi Hareesh
I'm Luke's customer. Thanks for your help.
We face a problem that CAN module gets many "Form Error" and enters the bus-off state.
We use "Error Frame" to find which bit trigger form error.
We find out that it's the "ACK delimeter".

Next we want to find what cause form error.
We measure the waveform of Tx(blue), Rx(purple). The waveform and the derivation of bit timing are shown below.

The time delay between Rx and Rx' comes from the input qualification of GPIO.
We assume the time delay is 0.167us( worst case ).

One bit time is 1us, we sample the value at 0.8us inside one bit time.
By derivation, we find that the sample point of ACK delimeter is behind the rising edge.
The time difference is about 0.04us which is less than 1 TQ(0.067us).

Form error occurs at ACK delimeter, which means CAN module should sample a "0" at ACK delimeter.
But by the derivation of bit timing, we get a result that the sample point of ACK delimeter is behind the rising edge, the module should sample a "1" at ACK delimeter.
Is our derivation of bit timing wrong ?
Or is it possible that CAN module sample wrong value when the time difference between sample point and edge is less than 1 TQ ?

We have run the experiment that we remove the input qualification of GPIO, and no form error occurs.

Thanks,
Ching-Wei

Ching,

Input qualification has the effect of delaying the signal inside the device. This is clearly shown in the header files:

    // Set qualification for selected CAN pins to asynch only

    // Inputs are synchronized to SYSCLKOUT by default.

    // This will select asynch (no qualification) for the selected pins.

    //

    GpioCtrlRegs.GPAQSEL2.bit.GPIO30 = 3;   // Asynch qual for GPIO30 (CANRXA)

    //GpioCtrlRegs.GPAQSEL2.bit.GPIO18 = 3;  // Asynch qual for GPIO18 (CANRXA)

As mentioned before, I/p qual circuitry will "delay" the arrival of the signal inside the module, thus messing the sampling point.