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CCS/TMS320F28379D: ADC sample per seconde problem

Guillaume katan
Intellectual 855 points

Part Number: TMS320F28379D

Tool/software: Code Composer Studio

Hello everyone,

I am trying to convert signals for my future application. For the moment I can acquire 4 measures (SOC0 - SOC3) from ADCa, I am using PWM1 (20Khz) SOCA for triggering ADCa and my problem is that the ADC take 33us for make 4 measures ... it's about 121 kSps lots of under the device max.

My configuration is there :

SYSCLK = 200 MHz

ADCCLK = 200/5 = 40 MHz

12 bits mode

ACQPS = 65 (the same for all SOC, so I think I am in synchronous mode)

Interrupt on SOC3 EOC for saving result in a buffer

Run from flash in standalone mode

GPIO31 (led on experimenter card) is used with an oscilloscope (toggle time measuring)

Have you got advice for increasing acquisition speed please ? I need to have four SOC results in less than 5us (if possible). Do you think it is an ADC problem, a memory access speed or a GPIO toggling speed ?

Thank you very much

Best regards,

Jérémy

  • 0
    TI__Guru 60865 points

    Hi Jeremy,

    If you are only using ADCA you don't need to worry about sync / async operation.

    You can determine how long a conversion should take by consulting the "ADC Timing Diagrams" section of the datasheet.  If ADCCLK = 40MHz(/5) and SYSCLK = 200MHz and S+H window = 66 SYSCLKS, then each conversion should take 51 SYCLK cycles so 4 conversions should take

    Trigger start delay = 2 SYSCLKs 

    +

    Samples and conversions = 4*(51+66) = 468 SYSCLKs

    +

    Entering ISR latency = 14 SYSCLKs

    +

    Time to toggle GPIO = ?

    =

    484 cycles

    At SYSCLK = 200MHz, this should take 2.42us, so something is definitely wrong if you measure 33us. The most obvious thing to check would be the PLL settings and the ADCCLK and ACQPS settings.  For the PLL, you should enable XCLKOUT on a pin and measure the SYSCLK frequency.  Writing the GPIO will definitely take some cycles and will vary depending on the method used, but I don't think this can explain the discrepancy.  

  • 0 in reply to Devin Cottier
    Intellectual 855 points

    Hi Devin,

    I have re-checked clocks with XCLKOUT and settings and all seem to be good. Gpio takes about 50ns for make a pulse (2xtoggle).

    I have "instrumented" my code with GPIO31 pulses (LED_ROUGE_ON and LED_ROUGE_OFF), this is my code with the measured time for between each step :

    As you can see the problem is not in the interrupt code, I saw two solutions : maybe it's an ADC config/working problem, or it is a pwm start (or other) problem. For the second case I will visualize PWM output.

    I have configured ADCa INT on SOC3 EOC and synchronised on PWM1 SOA. I have a question : only SOC0-3 are configured, are the other SOC will be scanned by the round robin process ? I don't use the burst mode.

    Moreover, when I do lots of successive conversions (result buffer size = 1000 per example) all values are equal to 0. Is a bad configuration or Vref missing can significantly slower the process ?

    Thank you for your help

    Best regards,

    Jérémy

  • 0 in reply to Guillaume katan
    Intellectual 855 points

    Hi again,

    I apologyze I think I made a mistake, my PWM is running at 30kHz .... or 33us period !! in fact I am measuring the time between two ADC measures, and in my case the ADC is triggered by PWM each 33us. I've displayed PWM and EOC pulses and I measuring about 4.72us for 8 measures on ADCA and ADCD channels. So my problem wasn't a real problem, we can see the importance of results interpretation ...

    Can you just answer to my questions about SOC conversion please :
    1/ If only 8 SOC are configured, is the round robin will scanned SOC8-15 or not ?

    2/ How to be sure that the first converted SOC is the SOC0 for each SOCA pwm pulse ? I know the ADCSOCFRC1 register but have no access to write it before pwm trigger.

    3/ Are the SOC synchronized for the 4 ADC modules ? If I trig ADCa INT1 with SOC7 EOC, does it mean that ADCd SOC7 have finished to acquire value ? (with same acqps time).

    Thank you very much,

    Jérémy

  • 0 in reply to Guillaume katan
    TI__Guru 60865 points
    Hi Jeremy,

    Good to hear you found the root of your initial issue. As for your other questions:

    1) SOCs will only convert when they are explicitly triggered. If you don't configure the SOC to be triggered by an ePWM, CPU timer, etc or if you don't explicitly software trigger a conversion the ADC will not convert. The round-robin only determines which SOC will convert next if multiple SOCs are pending at the same time.

    2)If you are only triggering with the ePWM on a periodic basis, the SOCs should always be converted in order of lowest SOC to highest SOC based on the round-robin priority scheme.

    3)The SOCs are not synchronized between ADC modules. For best performance it is required to ensure that the same triggers go to each ADC that is used, they use the same number of SOCs, and the timings are otherwise the same. There is a TRM section on this "ensuring synchronous operation". The ADCs can actually operate fully independent and asynchronous from each other, but this results in reduced performance as specified in the device datasheet ADC performance section.
  • 0 in reply to Devin Cottier
    Intellectual 855 points
    Thank you Devin for your explanation,

    I have printed ADC section datasheet but I can't find the part where the asynchronous performances are quantified and compared to synchronous mode.

    By experience, can you give me an order of magnitude of the time deviation (or percent) between both please ?

    Thank you very much,
    Jérémy
  • 0 in reply to Guillaume katan
    TI__Guru 60865 points

    Hi Jeremy,

    See the "ENOB" and "ADC-to-ADC isolation" specifications in the datasheet.