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TMS320F28027: unreasonable PWM initial output pulse

Howard Zou
Genius 12365 points

Part Number: TMS320F28027

Hi, with code below, I configured PWM frequency 40kHz, up-down count mode, TBPRD=750. CMPA=0, CMPB=750. TBCLK=SYSCLK=60MHz.

void InitEPwm2()
{
EPwm2Regs.TBPRD = 750; //40kHz
EPwm2Regs.TBPHS.half.TBPHS = 0x0000;
EPwm2Regs.TBCTR = 0x0000;
EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN;
EPwm2Regs.TBCTL.bit.PHSEN = TB_DISABLE;
EPwm2Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;
EPwm2Regs.TBCTL.bit.CLKDIV = TB_DIV1;
EPwm2Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
EPwm2Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm2Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
EPwm2Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
EPwm2Regs.CMPA.half.CMPA = 0;
EPwm2Regs.CMPB = 750;
EPwm2Regs.AQCTLA.bit.ZRO = AQ_SET;
EPwm2Regs.AQCTLA.bit.CAU = AQ_CLEAR;
EPwm2Regs.AQCTLB.bit.PRD = AQ_SET;
EPwm2Regs.AQCTLB.bit.CBD = AQ_CLEAR;
EPwm2Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; 
EPwm2Regs.ETSEL.bit.INTEN = 1; 
EPwm2Regs.ETPS.bit.INTPRD = ET_1ST;
}

with such code, I should get always low on both PWMA and PWMB outputs.

But the fact is that I will always get 12.5us(=750TBCLK which is half of the PWM period) pulse high on PWMB for once only. PWMA is always low.

Then I changed CMPA=50, the waveform is as below. It can be seen that PWMB output turns high at the very beginning that TBCTR=0 and started to increment, and it turns low when TBCTR=TBPRD

I've checked EPwm2Regs.AQCTLB.bit.ZRO=00, which means that there should be no action on PWMB when TBCTR=0.

yellow-PWMA,

blue-PWMB.

So why is there a pulse on PWMB and only once?

  • 0
    TI__Genius 15260 points

    Hi Howard,

    I'm out of the office so I don't have any hardware to try this on, but it is most likely due to the shadow registers getting loaded after the first cycle is complete (the next counter = 0). Can you try forcing a sync event or similar to trigger a shadow to active load? This will depend on your shadow configuration what the appropriate event to use will be.

    Regards,

    Kris

  • 0 in reply to Kris Parrent
    TI__Genius 12365 points
    Kris,
    Thanks for your reply. I tried changing the shadow mode to non-shadow and it worked.
    But explanation is not convincing. According to the waveform above captured by scope, both PWMA and PWMB set to 1 at TBCTR=0. Even if at the first cycle, since it's shadow mode, both CMPA and CMPB are 0, PWMB should set to 1 at TBCTR=period, not at TBCTR=0.
    Besides, can the sync event trigger a shadow to active load? it's not said on the technical reference manual for F28027. Sync event can only trigger TBPHS loaded to TBCTR. And CMPA and CMPB shadow to active load can only happen at either TBCTR=0 or period.
  • 0 in reply to Kris Parrent
    TI__Genius 12365 points
    And changing the shadow mode to non-shadow is not practical in customer's system. I'm not able to use shadow mode and force a shadow to active load through software at the very beginning. Hope you could offer some idea.
  • 0 in reply to Howard Zou
    TI__Genius 15260 points

    Hi Howard,

    I'm working on getting a board to try this on. We definitely recommend the use of shadow mode. I'll get back to you with details of the cause.

    Regards,

    Kris

  • 0 in reply to Howard Zou
    TI__Genius 15260 points

    Hi Howard,

    I've replicated the problem and determined this is because of event priority. Please reference Table 9. Action-Qualifier Event Priority for Up-Down-Count Mode of the EPWM User's Guide

    CMPA and CMPB events have higher priority than TBCTR=0. You have Channel A configured to clear on CMPA and set on TBCTR=0. At startup, these are both happening at the same time since CMPA=0. Since CMPA has higher priority, the PWM output is cleared. On Channel B, the TBCTR=0 event is taking place because you have set CMPB=750 so there is not a priority conflict.

    Regards,

    Kris

  • 0 in reply to Kris Parrent
    TI__Genius 12365 points

    I've noticed that table. It does not explain, because I didn't configure any channel B output change when TBCTR=0 event happens.

    I hope you have noticed that channel A does not have any problem, only channel B.