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CCS/TMS320F28035: Some question about the I2C module of C2000

Erwin Xie
Intellectual 935 points

Part Number: TMS320F28035

Tool/software: Code Composer Studio

Hi

I'm the FAE , Now my account  have a issues: when the DSP sent data to E2PROM, after DSP finishing the transmitting,  the SCL stayed in low, the DSP is the master and work in  transmitting state and the register XSMT=1. the waveform and the states of registers are as follow.

Could you tell me why the SCL stayed in low? what's wrong with DSP or E2PROM? how to avoid them？

I2COAR   0x7900    I2C own address register

0

I2CIER    0x7901    I2C interrupt enable register

36

I2CSTR   0x7902     I2C status register

13332

I2CCLKL  0x7903  I2C clock low-time divider register

65

I2CCLKH  0x7904  I2C clock high-time divider register

55

I2CCNT    0x7905   I2C data count register

1

I2CDRR    0x7906   I2C data receive register

67

I2CSAR    0x7907   I2C slave address register

80

I2CDXR   0x7908    I2C data transmit register

40

I2CMDR   0x7909    I2C mode register

1568

I2CISRC   0x790A    I2C interrupt source register

3

I2CEMDR  0x790B    I2C extended mode register

1

I2CPSC    0x790C    I2C prescaler register

4

I2CFFTX   0x7920    I2C FIFO transmit register

24704

I2CFFRX   0x7921    I2C FIFO receive register

8320

 1.TIF


 

  • 0
    TI__Mastermind 45606 points

    Hello Erwin,

    Could you provide more information on how the customer is setting up the I2C module on the F28035 and provide the I2C_initialization code the customer is using if possible? Is the customer using FIFO mode, how many bytes are they trying to send/receive at a time, are they setting a repeated START condition, STOP condition, etc.?

    I'm also a little confused by the register data you provided, are the numbers on the right side the values that these registers are set to? If so could you please provide this data in Hexadecimal format?

    The I2C SCL line could be held low by the slave device (eeprom) while it processes the command or while any interrupts are serviced. From the waveform you provided it looks like an ACK is received from the slave for both the addressing and sent byte. Are there any other waveforms you can provide that may be more clear?

    Something else that may help us understand what is going on is to look at the I2CSTR register at different times during the transmission (Before, during, after the transmission).

    Thanks,
    Kevin