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CCS/TMS320F28377D: ADC interrupt execution

Emma Wang
Expert 5290 points
Part Number: TMS320F28377D


Tool/software: Code Composer Studio

I set the ADC interrupt triggered by the EPWM.

If the ADC interrupt has not been executed completely while the EPWM triggers the ADC sample.

 Will the ADC interrupt broke up when the ADC interrupt processing time is out of time?

  • 0
    TI__Mastermind 28275 points

    Hi Emma,

    Trigger level -> The ADC is based on the SOC principle of operation which uses the RRPointer. The RRPointer determines the next SOC to convert but it does not move until the conversion of the previous SOC is complete. So for every ADC, the next SOC will not convert until the currently converting SOC is done.

    Interrupt level -> By the default, the ADC does not operate in continuous interrupt mode so the interrupt flag has to be manually cleared before another is generated by EOC. However, if you are operating in continuous mode, an interrupt pulse will be generated for every EOC. This continuous interrupts will not generate a new ISR because by default, the C28x Interrupt Response disables servicing another interrupt until the currently serviced is complete. You can however override this default behavior through interrupt nesting. This link goes into more detail: http://processors.wiki.ti.com/index.php/Interrupt_Nesting_on_C28x