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TMDSHVPSFBKIT: PCMC PWM setup

Pauli
Intellectual 270 points
Part Number: TMDSHVPSFBKIT


Hello

I'm trying to study the HVPSFB example project from TI. Is there a comprehensive documentation about the PWM setup? I've found the following posts somewhat helpful, but still struggle to understand how it works:

e2e.ti.com/.../932965
e2e.ti.com/.../764058

I understand that the ISR is reconfiguring PWM1 so that the ISR is executed on both rising, and falling slope of PWM1 time base. Also, that PWM2 is in up-count mode so it will have a double frequency, and changing the AQCTLx setup in the ISR makes the right half cycles to appear, right?

Now, looking at the Figure 12 in the HVPSFB User Guide, what I don't understand is how does the Q3 pulse start right after the Q2 reset? On one of the threads it was explained that the PWM2 is synchronized to the comparator output. So, does that shift the PWM2 time base? That would explain why the PWM2 pulses start so early when compared to PWM1? But, if the PWM2 time base is shifted, then wouldn't it mess up all the ISR reconfigurations for PWM2 as they are synchronized to PWM1?

I have replicated the peak current functionality with fixed PWM time bases, but I wonder if I'm missing some crucial part of it.

It would be very helpful if the PWM time base slopes were described in the figure. And it would help if the ISR code and it's timing was described somewhere.

Best regards
Pauli

  • 0
    TI__Genius 15935 points
    Hi Pauli,

    Thank you for your post. Your thread has been assigned to a C2000 expert and should be answered soon.

    Best regards,
    Chen
  • 0 in reply to Chen Jiang ti
    Intellectual 270 points

    Anything new on this one?

    Best regards

    Pauli

  • 0
    TI__Guru 62975 points

    Pauli,

    I'm not all too familiar with the example code myself, but having poked around, it looks like the EPWM2 (Q2+Q3) signals are controlled through the AQCTL + TZCTL registers. The Clear on Q2 would have come from the TZCTL trip, while the Set on Q3 would have come from AQCTL.

    The Q2 and Q3 signals can have varying durations of Q2 Low + Q3 Low in a running system because the comparator trip signal will arrive asynchronously to EPWM2. The only constant between the signals that I see is a minimum dead-band that is controlled by setting the CMPA and CMPB values. I think the back-to-back Reset + Set actions are only meant to demonstrate functional sequence of signals rather than tightly coupled events.

    Again, I can easily be wrong here, but that's what I understand from looking at the software.

    -Tommy

  • 0 in reply to tlee
    Intellectual 270 points

    Thanks for your reply.

    Here's a quick drawing of what I'm thinking of.

    I'm guessing the NOPs in the isr code are there to delay setting of PWM1 CMPA and CMPB so that they don't happen until the slope turns around?

    As far as I understand is that for example the Q2 (PWM2A) pulse is set high from a CAU or event at CMPA = 20. It seems that PWM2 time base is synchronized to PWM1 on CMPB which will alternate between 0 and PRD. So effectively PWM2 time base is synchronized to PWM1 zero and period?

    Also, PWM2 time base resets on trip events, but I cannot see how it would get shifted since phase loading isn't used. Then again if it is shifted as the User's Guide figure would suggest, then I think the PWM2 CMPA and CMPB reconfigure in ISR would not work.

    I'm probably missing something here.

    Best regards

    Pauli

  • 0 in reply to Pauli
    TI__Guru 62975 points
    Pauli,

    It sounds reasonable that the NOPs are there to help synchronize with the up/down direction change. The ramp generator will also need some time for late trips to clear before re-triggering for the next cycle.

    I arrived at the same understanding as you have with respect to the EPWM1 -> EPWMx synchronization on ZRO, PRD, and Trip1.

    I don't think the Trip synchronization will do much either since the active EPWM2 output should be stuck in the cleared state until the trip condition is cleared by the ISR, and the EPWM1 SYNCO would ultimately reset any phase shift. I suppose that it could allow you to track when the trip occurred by looking at the difference between the EPWM1 and EPWM2 TBCTRs.

    -Tommy