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TMS320F28335: SCI Loopback Interrupt Example Modification, RX Problem

Part Number: TMS320F28335

I started off by modfiying scia_loopback_interrupts by ti for 2833x device. Basically, the example works all fine for both scia and scic configurations when loopback is enabled for both via LOOPBKENA register. However, when I disable the loopback from LOOPBKENA register, I  don't get receive interrupts anymore when there is an actual signal on RX.

I tested it by shorting the TX to RX manually with my RS485 IC (enabling Drive Enable and Receive Enable of the IC basically does this job), and looked at the signal on RX pin with an oscilloscope and eveything looked fine to me, there is no difference in configuration except loopback is done manually instead of with LOOPBKENA register.

Below you can find the code I modified from the example.

void main(void)
{
   Uint16 i;

// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the DSP2833x_SysCtrl.c file.
   InitSysCtrl();

// Step 2. Initialize GPIO:
// This example function is found in the DSP2833x_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
// InitGpio();
// Setup only the GP I/O only for SCI-A and SCI-B functionality
// This function is found in DSP2833x_Sci.c
   InitSCI_GPIO();

// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
   DINT;

// Initialize PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the DSP2833x_PieCtrl.c file.
   InitPieCtrl();

// Disable CPU interrupts and clear all CPU interrupt flags:
   IER = 0x0000;
   IFR = 0x0000;

// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example.  This is useful for debug purposes.
// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
// This function is found in DSP2833x_PieVect.c.
   InitPieVectTable();

// Interrupts that are used in this example are re-mapped to
// ISR functions found within this file.
   EALLOW;    // This is needed to write to EALLOW protected registers
   PieVectTable.SCIRXINTA = &sciaRxFifoIsr;
   PieVectTable.SCIRXINTC = &scicRxFifoIsr;
   EDIS;   // This is needed to disable write to EALLOW protected registers

// Step 4. Initialize all the Device Peripherals:
// This function is found in DSP2833x_InitPeripherals.c
// InitPeripherals(); // Not required for this example
   scia_fifo_init();  // Init SCI-A
   scic_fifo_init();  // Init SCI-A

// Step 5. User specific code, enable interrupts:

// Init send data.  After each transmission this data
// will be updated for the next transmission
   for(i = 0; i<8; i++)
   {
      sdataA[i] = i;
   }

   rdata_pointA = sdataA[0];

// Enable interrupts required for this example
   PieCtrlRegs.PIECTRL.bit.ENPIE = 1;   // Enable the PIE block
   PieCtrlRegs.PIEIER9.bit.INTx1=1;     // PIE Group 9, int1 SCIRXINTA,
   PieCtrlRegs.PIEIER8.bit.INTx5=1;     // PIE Group 8, INT5 SCIRXINTC
   IER = 0x180;    // Enable CPU INT 9 and 8
   EINT;

// Step 6. IDLE loop. Just sit and loop forever (optional):
    for(;;)
    {
        while (SciaRegs.SCIFFTX.bit.TXFFST != 0) {}
        for(i=0; i< 8; i++)
        {
           SciaRegs.SCITXBUF=sdataA[i];     // Send data
        }
        while (ScicRegs.SCIFFTX.bit.TXFFST != 0) {}
        for(i=0; i< 8; i++)
        {
           ScicRegs.SCITXBUF=sdataA[i];     // Send data
        }
    }
}

__interrupt void sciaRxFifoIsr(void)
{
    Uint16 i;
    for(i=0;i<8;i++)
    {
       rdataA[i]=SciaRegs.SCIRXBUF.all;     // Read data
    }

    SciaRegs.SCIFFRX.bit.RXFFOVRCLR=1;   // Clear Overflow flag
    SciaRegs.SCIFFRX.bit.RXFFINTCLR=1;   // Clear Interrupt flag

    PieCtrlRegs.PIEACK.all |= PIEACK_GROUP9;       // Issue PIE ack
}
__interrupt void scicRxFifoIsr(void)
{
    Uint16 i;
    for(i=0;i<8;i++)
    {
       rdataA[i]=ScicRegs.SCIRXBUF.all;  // Read data
    }

    ScicRegs.SCIFFRX.bit.RXFFOVRCLR=1;   // Clear Overflow flag
    ScicRegs.SCIFFRX.bit.RXFFINTCLR=1;   // Clear Interrupt flag

    PieCtrlRegs.PIEACK.all |= PIEACK_GROUP8;
}
void scia_fifo_init()
{
   SciaRegs.SCICCR.all =0x0007;   // 1 stop bit,  No loopback
                                  // No parity,8 char bits,
                                  // async mode, idle-line protocol
   SciaRegs.SCICTL1.all =0x0003;  // enable TX, RX, internal SCICLK,
                                  // Disable RX ERR, SLEEP, TXWAKE
   SciaRegs.SCICTL2.bit.TXINTENA =1;
   SciaRegs.SCICTL2.bit.RXBKINTENA =1;
   SciaRegs.SCIHBAUD = 0x0000;
   SciaRegs.SCILBAUD = 7; // (30E6/4)/((7+1)*8) = 117187 baud rate which creates %1.72 error from 115200 baud (2% error or less is ideal)
   SciaRegs.SCICCR.bit.LOOPBKENA =1; // Enable loop back
   SciaRegs.SCIFFTX.all=0xC028;
   SciaRegs.SCIFFRX.all=0x0028;
   SciaRegs.SCIFFCT.all=0x00;

   SciaRegs.SCICTL1.all =0x0023;     // Relinquish SCI from Reset
   SciaRegs.SCIFFTX.bit.TXFIFOXRESET=1;
   SciaRegs.SCIFFRX.bit.RXFIFORESET=1;
}

void scic_fifo_init()
{
   ScicRegs.SCICCR.all =0x0007;   // 1 stop bit,  No loopback
                                  // No parity,8 char bits,
                                  // async mode, idle-line protocol
   ScicRegs.SCICTL1.all =0x0003;  // enable TX, RX, internal SCICLK,
                                  // Disable RX ERR, SLEEP, TXWAKE
   ScicRegs.SCICTL2.bit.TXINTENA =1;
   ScicRegs.SCICTL2.bit.RXBKINTENA =1;
   ScicRegs.SCIHBAUD = 0x0000;
   ScicRegs.SCILBAUD = 7; // (30E6/4)/((7+1)*8) = 117187 baud rate which creates %1.72 error from 115200 baud (2% error or less is ideal)
   ScicRegs.SCICCR.bit.LOOPBKENA =1; // Enable loop back
   ScicRegs.SCIFFTX.all=0xC028;
   ScicRegs.SCIFFRX.all=0x0028;
   ScicRegs.SCIFFCT.all=0x00;

   ScicRegs.SCICTL1.all =0x0023;     // Relinquish SCI from Reset
   ScicRegs.SCIFFTX.bit.TXFIFOXRESET=1;
   ScicRegs.SCIFFRX.bit.RXFIFORESET=1;
}

void InitSCI_GPIO()
{
    EALLOW;

    //
    // Enable internal pull-up for the selected pins
    // Pull-ups can be enabled or disabled disabled by the user.
    // This will enable the pullups for the specified pins.
    //
    GpioCtrlRegs.GPBPUD.bit.GPIO36 = 1;  // Disable pull-up for GPIO36 (SCIRXDA)
    GpioCtrlRegs.GPBPUD.bit.GPIO35 = 1;  // Disable pull-up for GPIO35 (SCITXDA)

    //
    // Set qualification for selected pins to asynch only
    // Inputs are synchronized to SYSCLKOUT by default.
    // This will select asynch (no qualification) for the selected pins.
    //
    GpioCtrlRegs.GPBQSEL1.bit.GPIO36 = 3;  // Asynch input GPIO36 (SCIRXDA)

    //
    // Configure SCI-A pins using GPIO regs
    // This specifies which of the possible GPIO pins will be SCI functional
    // pins.
    //
    GpioCtrlRegs.GPBMUX1.bit.GPIO36 = 1; // Configure GPIO36 to SCIRXDA
    GpioCtrlRegs.GPBMUX1.bit.GPIO35 = 1; // Configure GPIO35 to SCITXDA

    GpioCtrlRegs.GPCPUD.bit.GPIO72 = 1;  // Disable pull-up for receive enable SCIA
    GpioCtrlRegs.GPBPUD.bit.GPIO45 = 1;  // Disable pull-up for receive enable SCIA
    GpioCtrlRegs.GPBPUD.bit.GPIO44 = 1;  // Disable pull-up for drive enable SCIA

    //
    // Configure SCI-A pins using GPIO regs
    // This specifies which of the possible GPIO pins will be SCI functional
    // pins.
    //
    GpioCtrlRegs.GPCMUX1.bit.GPIO72 = 0;
    GpioCtrlRegs.GPBMUX1.bit.GPIO45 = 0;
    GpioCtrlRegs.GPBMUX1.bit.GPIO44 = 0;

    GpioCtrlRegs.GPCDIR.bit.GPIO72 = 1;
    GpioCtrlRegs.GPBDIR.bit.GPIO45 = 1;
    GpioCtrlRegs.GPBDIR.bit.GPIO44 = 1;

    GpioDataRegs.GPCSET.bit.GPIO72 = 1; // receive not enabled
    GpioDataRegs.GPBSET.bit.GPIO45 = 1; // receive not enabled
    GpioDataRegs.GPBCLEAR.bit.GPIO44 = 1; // drive not enabled

    //
    // Enable internal pull-up for the selected pins
    // Pull-ups can be enabled or disabled disabled by the user.
    // This will enable the pullups for the specified pins.
    //
    GpioCtrlRegs.GPBPUD.bit.GPIO62 = 1;  // Disable pull-up (SCIRXDC)
    GpioCtrlRegs.GPBPUD.bit.GPIO63 = 1;  // Disable pull-up (SCITXDC)

    //
    // Set qualification for selected pins to asynch only
    // Inputs are synchronized to SYSCLKOUT by default.
    // This will select asynch (no qualification) for the selected pins.
    //
    GpioCtrlRegs.GPBQSEL2.bit.GPIO62 = 3;  // Asynch input GPIO62 (SCIRXDC)

    //
    // Configure SCI-A pins using GPIO regs
    // This specifies which of the possible GPIO pins will be SCI functional
    // pins.
    //
    GpioCtrlRegs.GPBMUX2.bit.GPIO62 = 1; // Configure GPIO62 to SCIRXDC
    GpioCtrlRegs.GPBMUX2.bit.GPIO63 = 1; // Configure GPIO63 to SCITXDC

    GpioCtrlRegs.GPCPUD.bit.GPIO65 = 1;  // Disable pull-up for receive enable SCIC
    GpioCtrlRegs.GPCPUD.bit.GPIO64 = 1;  // Disable pull-up for drive enable SCIC
    //
    // Configure SCI-A pins using GPIO regs
    // This specifies which of the possible GPIO pins will be SCI functional
    // pins.
    //
    GpioCtrlRegs.GPCMUX1.bit.GPIO65 = 0;
    GpioCtrlRegs.GPCMUX1.bit.GPIO64 = 0;


    GpioCtrlRegs.GPCDIR.bit.GPIO65 = 1;
    GpioCtrlRegs.GPCDIR.bit.GPIO64 = 1;


    GpioDataRegs.GPCSET.bit.GPIO65 = 1; // receive not enabled
    GpioDataRegs.GPCCLEAR.bit.GPIO64 = 1; // drive not enabled

    EDIS;
}

  • Is there any data in the RXBUFs?

    Are you connecting the SCIA TX to SCIC RX ? and the SCIC Tx to SCIA RX?

    Do I understand this correctly? You are trying to do an external loopback?

    sal
  • No, my external loopback is connecting sciatx to sciarx and scictx to scicrx. While I do that I disable the LOOPBACKENA bit in my code. To make sure my external loopback is fine, I checked each rx pin with an oscilloscope and saw the same data as in the tx pin.
  • If you have internal loopback working, and then disable internal loopback with the proper pins connected, I cannot think of any reason the external loopback would not work.

    Are you sure the only difference is the LOOPBACKEN bit?

    I think this may be a hardware issue.

    sal
  • Yes, I am sure the only difference is LOOPBACKEN bit. I only comment out that part and then after configuring my external loopback, I see the signal on the actual rx pin is the same as the tx pin with oscilloscope. So the hardware seems alright to me, I just can't figure out... Also, I'm trying out the same thing for both SCIA and SCIC.

  • Instead of commenting out LOOPBACKEN = 1; this time I tried changing it to LOOPBACKEN = 0;
    Even though I'm erasing the flash and the default value of LOOPBACKEN is already 0, this seemed to solve my problem. This is a bit strange to me since there is a default value for it and it is 0 already. I did not understand how this actually solves my problem.
  • I am pleased this solved your problem.

    The order of initializing the SCI module is very finicky. Certain bits and registers need to be configured in a specific order. I believe it is related to resting it and taking it out of reset.

    Glad you got it working!

    sal