TMS320F28035: Cputimer0 interrupt is lost when PWM1 interrupt generate

Hi,

The above doesn't make sense as CPUtimer0 has the highest priority and no way PWM1 timer can override CPUtimer0. Do you have any timing waveforms to share?

Regards,
Gautam

I use GPIO22 to monitor cputimer0 interrupt (yellow) and use GPIO23 to monitor pwm interrupt (blue)

__interrupt void cpu_timer0_isr(void)
{

GpioDataRegs.GPASET.bit.GPIO22 = 1; // Set output
CpuTimer0.InterruptCount++;
CpuTimer0Regs.TCR.bit.TIF = 1; /* Clear interrupt flag (TIF) for CPU timer0 */
PieCtrlRegs.PIEACK.bit.ACK1 = 1 ; /* Clear interrupt acknowledge PIEACK3 group for cpu timer0 interrupt */
GpioDataRegs.GPACLEAR.bit.GPIO22 = 1; // Clear output

}

__interrupt void pwm_isr1(void)
{
GpioDataRegs.GPASET.bit.GPIO23 = 1; // Set output
pwm1interrupt++; // Code for test
EPwm1Regs.ETCLR.bit.INT = 1; //Clear PWM 3 interrupt flag, wait for next PWMONTIME interrupt
PieCtrlRegs.PIEACK.bit.ACK3 = 1 ; /* Clear interrupt acknowledge PIEACK3 group for cpu timer0 interrupt */
GpioDataRegs.GPACLEAR.bit.GPIO23 = 1; // Set output
}

You can see everytime PWM interrupt, cputimer interrupt is lost

Qi,

is the CPU timer interrupt flag set during and at the end of the PWM ISR?

Regards,
Cody 

Hello Dear Cody:

Thanks very much for your feedback.

Yes, Cpu timer interrupt flag is set at the end of the PWM ISR. I make a break piont at the end of the PWM ISR and monitor the register value with debug. 

By the way, if I only use cpu timer interrupt or only use pwm interrupt. Everything is ok. Do you have some example to configure 2 interrupt? I check the control suite and never find some example which uses 2 kinds of interrupt together. I do not know if my configuration is good.