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TMS320F280049: Power Sequence

Kengo Furuya
Expert 7650 points
Part Number: TMS320F280049


Hello, 

I have a question about power sequence of TMS320F280049.

The datasheet specify the power sequence as below.

"When using an external source to supply VDD, the voltage on VDDIO must be greater than VDD or no less than 0.3 V below VDD at all times."

On the customer's system, the power up sequence is keep the datasheet requirement, but power down sequence cannot meet it.

VDDIO 3.3V become to lower voltage than VDD 1.2V  in the process of power down sequence due to the errata about the VDD supply as below.

"VDD Supply: During VDDIO Power Up, VDD May Also Rise"

-During the power down sequence, VDDIO < VDD. Is it problem? Due to the errata, it is difficult to keep the condition of VDDIO > VDD during the power down sequence. 

-Any plan to fix this errata?

Regards,

Furuya

  • 0
    TI__Genius 15385 points
    Hi Furuya,

    I dont think there should be a problem while power down sequence, but I will have to check with the experts here to confirm.

    No plan in fixing this errata at this point, as it mentions in the solution in errata, customer will have to change the ramp time to no build charge on VDD to maintain the delta of at least 0.3V between VDD and VDDIO.

    Regards,
    Nirav