TMS320F280049: Device I/O prop delays

Eric Best

Due to some intricate timing with external logic devices, there is a need to fully understand I/O buffer propagation delays on F280049. Will need min and max Tpd for -40 to 125C temp range.. Some key signals are:

QEP Inputs (Input A, Index)

QEP Output (Strobe Out)

SPI Inputs (Clock, Transmit Enable, SIMO)

EPWM (Output, SYNCI)

GPIO

Thanks,
Eric

over 8 years ago

0 Devin Cottier over 8 years ago

TI__Guru 60865 points

Hi Eric,

Can you help me understand the timings that you need:

Is the "input propagation delay" the time between when the input voltage crosses Vil or Vih to when the input logic level is qualified by the final flip-flop in the input logic?

Similarly, is "output propagation delay" the time between the start of the clock where the output is to change to when the output buffer logic level crosses Voh or Vol?

I can try and see if I can get some estimates from design extraction, but this will probably take some time.

We likely won't be able to provide a true "min/max" across all operating conditions datasheet type parameter.

0 Eric Best over 8 years ago in reply to Devin Cottier

TI__Expert 7505 points

Hi Devin,

Yes, your statements reflect what is needed.

Understand this is some very low level info. So appreciate any info which can help.

Regards,
Eric

0 Devin Cottier over 8 years ago in reply to Eric Best

TI__Guru 60865 points

Hi Eric,

I am still working on this.

0 Devin Cottier over 8 years ago in reply to Devin Cottier

TI__Guru 60865 points

Hi Eric,

One thing you might want to look at are the IBIS models for this devices. This should give some additional information on the characteristics and timing of the input and output buffers on this device:

www.ti.com/.../toolssoftware

0 Devin Cottier over 8 years ago in reply to Devin Cottier

TI__Guru 60865 points

Some typical estimates of I/O propagation delays were provided offline.

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TMS320F280049: Device I/O prop delays