Hi, If I set the AQCTLA.bit.ZRO = AQ_SET in the code snippet below, then the PWM output goes to logic level high right after making TBCLKSYNC = 1, which is what I expected. However, if I set the AQCTLA.bit.ZRO = AQ_TOGGLE, the PWM output remains low and only toggles high after the counter wraps around the TBPRD=30000. How can I make it toggle low->high soon after enabling TBCLKSYNC? How can I initialize the PWM output to high and then have it toggle high->low instead? Can this condition be implemented before setting TBCLKSYNC = 1? It appears that the event CTR = Zero is only seen by AQ_TOGGLE after the counter wraps around the first time while for AQ_SET it is seen right after enabling TBCLK. Thanks. EPwm1Regs.TBPRD = 30000; EPwm1Regs.TBCTR = 0x0000; EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; EPwm1Regs.AQCTLA.bit.ZRO = AQ_SET; // Case 1: PWM output is high right after releasing the TBCLK //EPwm1Regs.AQCTLA.bit.ZRO = AQ_TOGGLE; // Case 2: PWM output toggles low->high only after TBCTR wraps around TBPRD=30000 SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;