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TMS320F28377D: CpuTimer1 Interrupt Failing When Running from Flash

Part Number: TMS320F28377D


Hi all,

I have a project up and running on a 28377D microcontroller, which I had originally working on a 28377S, which I then ported.  In my code I have an ISR linked to the CpuTimer1.  The purpose is to detect a communication fault between the microcontroller and an FPGA.  My RAM based build works fine, but when I go to run the code on my Flash based build I end up running into the catch all Illegal_ISR.  I'm confused as to why this is happening.  I have _FLASH defined for my project so I know that ramfuncs is being initialized at start up.  I'm scratching my head as to what is going on.  Any help would be appreciated.

Lance

  • Lance,

    Did you make sure to do memcpy() for all the sections that need to be copied to RAM?

    Did you try to locate the function/instruction that is causing illegal ISR trap? Use single-stepping/breakpoints to identify the code that is causing the illegal trap.

    Thanks and regards,
    Vamsi
  • Vamsi,

    I run a memcpy() call as part of my initialization.  I have _FLASH defined so it is called in the InitSysCtrl function call.  All of my ISRs are set to run from RAM along with any other time critical functions. 

    The only time the Illegal_ISR happens is when I setup with Pie Vector Table to use the CpuTimer1 interrupt which I do with the line of code:
    PieVectTable.TIMER1_INT = &comm_watchdog_isr;

    When I subsequently configure the CpuTimer1Regs to enable interrupts I run into the issue. If I never initialize the CpuTimer1Regs I don't run into this issue. I am initializing the timer AFTER I setup the PIE vector. I don't know if that makes a difference, but I haven't seen any issues when running from RAM.

    My configuration function does the following:
    CpuTimer1Regs.TPR.all = 0x0000;
    CpuTimer1Regs.TPRH.all = 0x0000;
    CpuTimer1Regs.PRD.all = 0x00000FFF;
    CpuTimer1Regs.TCR.all = 0x4020;

    I also reset the timer in my nominal ISR using:
    CpuTimer1Regs.TCR.bit.TRB = 1;

    I tried to debug what is going on and I can't single step into the issue. I can get it to go past all of the configuration and enter my main background loop before I start single stepping. I held down the F5 key for a few minutes and I couldn't get it to trip the illegal ISR. Any other ideas would be helpful.

    Lance

  • As an addendum, I have been doing some additional testing and ANY ISR that gets triggered for some reason ends up falling into the Illegal_ISR when I am running from Flash. I will double check to make sure my configuration for ramfuncs, and the associated pointers are correct.

    Lance
  • Lance,

    Check your map file to find the run address of your ISR and make sure that the code is there at that RAM address after you run memcpy().

    Do you assign the ISRs to .TI.ramfunc section using #pragma CODE_SECTION? Or did you create a different section?  

    Thanks and regards,
    Vamsi

  • Vamsi,

    I am using the #pragma CODE_SECTION to assign the functions to Ramfuncs at start up. I looked at the .map file and it is allocating RamfuncsRunStart to 0x0000A000 and the particular ISR in question is at memory location 0x0000A086. When I go into disassembly, I am able to look at that memory location and it finds the first assembly instruction of the ISR routine in question. I also checked the PIE vector table and the vectors are pointing to the right memory locations as well.  I'm not sure if using memory LS4 has any issues associated with it or not.  I could change the target location for ramfuncs if that would help.  I'm not sure what to do at this point.

    Lance

  • Vamsi,

    I ended up modifying the linker file I was using, which leveraged the 2837xD_FLASH_CLA_lnk_cpu1.cmd file. I changed the run location for ramfuncs to LS3 instead of LS4, and that appears to have fixed the problem. Could this possibly have to do with the use of the CLA in some way? I got things working, but this isn't exactly a satisfying answer to the source of the problem.

    Lance
  • Lance,

    I see below details in TRM.  May be you configured LS4 as CLA program memory - Please check.  If that is the case, CPU can not fetch from LS4 and hence you reaching illegal_ISR.  Hope this helps.

    Thanks and regards,
    Vamsi

  • Vamsi,

    I checked my CLA configuration code, and I was configureing LS4 to be CLA1 program memory. That explains why switching the ramfuncs section to LS3, fixed the problem. Thanks for all of the help

    Best regards,

    Lance Hummel