Hi Champs,
We are using F2837xD and connecting SDRAM via EMIF.
The CPU2 base routine has some interrupt functions and both interrupt function has write EMIF command for SDRAM.
First of all ,CPU2 is proccessing lower priority interrupt function and writing EMIF. During this task, system accept interrupt for Higher priority interrupt function and it will also start writing EMIF . In this case , low priority task will suspend and move to higher priority task.
Higher priority task also have writing EMIF task. So, lower priority task EMIF writing have to stop during high priority task.
If lower priority task writing EMIF didn't finish and suspend this , how does this lower priority task behave after completing higher priority task EMIF writing ?
Is lower priority task writing EMIF able to re-start on the middle ? Or it re-start writing from the beginning ?
Regards,
Kz777
