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LAUNCHXL-F28379D: SCI Boot Mode, fw upgrade via sci

Part Number: LAUNCHXL-F28379D
Other Parts Discussed in Thread: CONTROLSUITE

Hello

Default boot mode pins of LAUNCHXL-F28379D are GPIO84 and GPIO72, for sci boot GPIO84 must be HIGH. However also SCI boot uses GPIO84 and GPIO85 so how can i do sci flash programming? I need step by step instructions. Also usart pins of LAUNCHXL-F28379D are connected to GPIO42 and 43 and this pins are not compatible for sci boot, isn'it?

Regards...

  • Hi,

    F28379D, has only 2 default SCI boot mode options available in BOOTROM. If you want to use a different SCI / pin mux options you have to write your own SCI bootloaders.

    SCIA boot option 1 uses SCITXDA = 84 & SCIRXDA = 85 (GPIO72 = 0 ; GPIO84 = 1)

    SCIA boot option 2 uses SCITXDA = 29 & SCIRXDA = 28 (GPIO72 = 1 ; GPIO84 = 1 ; OTP_KEY = 0x5A ; OTP_BMODE = 0x81)

    Please refer to the below controlSuite example to get started on your custom SCI firware upgrade example code.

    <controlSUITE>\device_support\F2837xD\v210\F2837xD_examples_Dual\F2837xD_sci_flash_kernels

    Regards,
    Manoj
  • Dear Manoj

    Thanks for the answer, sorry I did not fully express our problem in the previous article.

    Right now we are making a new design using F2837xD and our head is a bit confused. Our requests are as follows;


    1-) The software needs to be updated via the serial port.
    2-) The software must be code-protected (DCSM must be configured but we dont know which configurations met our requiremets). In this case (code protected), is serial port software update affected?

    There is also something else we want to learn, is it necessary to change the boot mode of the chip over the card when updating via serial port? The product will be in a closed box and there will be difficulties. Is it not possible to get the chip to the sci boot mode from the software?

    We need clear statements (step by step to do) about what we should do for these.

    Regards

  • Hi,

    The example code mentioned in previous message is good starting point. This example code helps you to receive commands from host to unlock device, erase flash, update software, reset, run and also has the ability to send status details to host to tell the status of the device. This code as of now configured to run from RAM. You need to change this to run from flash.

    By default, you have boot to flash to start running this code from flash. If SCI receives command from host to continue running application code, just jump to your application code and run the code. But, If the SCI receives command to update software, you can unlock the device, erase sectors which have application code, receive new application code via SCI port and program application sectors with new code.

    Regards,
    Manoj
  • Dear Manoj
    What is the best way to do a bootloader? Should I create a separate project for the bootloader and the application, or both in the same project?
    I am very happy if you tell me step by step.
  • Yes, I would suggest you to have a separate bootloader project and application project.

    For the bootloader project, just convert the project to run from flash instead of RAM

    For application project, you have to map your application to reside in flash sectors other than the bootloader sectors. Your bootloader project needs to be cognizant of start address of application code if it doesn't want to update application code so that it can just jump to application code.

    Regards,
    Manoj
  • Dear Manoj
    Thank you for answer, i wil try to implement bootloader as seperate project.
  • Please close the by thread by marking posts which answered your question. This would be useful for other looking through your post.

    -Manoj
  • Dear Manoj

    I made separate projects for bootloader and application code;

    For cpu1, flasha and flashb used by bootloader and rest of the flash using for application. I make modification of both linker cmd files and debug options.

    Every system reset, bootloader at 0x80000 runs first the check the SCIA auto baud lock status, if i set run kernel otherwise run application,

    th autobaud. when it gets "a", or "A" echo back the character and jump to bootloader, so bootloader code detect abd bit is set then run bootloader. I have successufly program cpu1 via this method. I made same modfiications also TI serial_flash_loader c++ project, for example skip kernel loading.

    in the same sense, i made two poject for cpu2, bootloader and application code. Boot loade based on ti example. At his point my head little confussed. I did'nt get cpu2 bootloader work, i am sharing init codes for all poject please help me to successfull dfu for cpu2.

    CPU1 BOOTLOADER
    	
    uint32_t main(void)
    {
        if (SciaRegs.SCIFFCT.bit.ABD)
        {
            //
            // SCIA Flush
            //
            
            while(!SciaRegs.SCICTL2.bit.TXEMPTY)
            {
            }
            
            //
            // Step 1. Initialize System Control:
            // Enable Peripheral Clocks
            // This example function is found in the F2837xD_SysCtrl.c file.
            //
            InitSysCtrl(); //PLL activates
            
            //
            // Step 2. Initialize GPIO:
            // This example function is found in the F2837xD_Gpio.c file and
            // illustrates how to set the GPIO to it's default state.
            //
            InitGpio();
            
            //
            // Step 3. Clear all interrupts and initialize PIE vector table:
            // Disable CPU interrupts
            //
            DINT;
            
            //
            // Initialize the PIE control registers to their default state.
            // The default state is all PIE interrupts disabled and flags
            // are cleared.
            // This function is found in the F2837xD_PieCtrl.c file.
            //
            // InitPieCtrl();
            
            //
            // Disable CPU interrupts and clear all CPU interrupt flags:
            //
            IER = 0x0000;
            IFR = 0x0000;
    
            //
            // Initialize the PIE vector table with pointers to the shell Interrupt
            // Service Routines (ISR).
            // This will populate the entire table, even if the interrupt
            // is not used in this example.  This is useful for debug purposes.
            // The shell ISR routines are found in F2837xD_DefaultIsr.c.
            // This function is found in F2837xD_PieVect.c.
            //
            //    InitPieVectTable();
            InitIpc();
            InitFlash();        
    
            EALLOW;
               GpioCtrlRegs.GPBPUD.bit.GPIO42 = 0;
               GpioCtrlRegs.GPBPUD.bit.GPIO43 = 0;
    
               GpioCtrlRegs.GPBQSEL1.bit.GPIO43 = 3;
    
               GpioCtrlRegs.GPBMUX1.bit.GPIO42 = 3;
               GpioCtrlRegs.GPBGMUX1.bit.GPIO42 = 3;
    
               GpioCtrlRegs.GPBMUX1.bit.GPIO43 = 3;
               GpioCtrlRegs.GPBGMUX1.bit.GPIO43 = 3;
            EDIS;
            
            //SciaRegs.SCIFFCT.bit.ABDCLR = 1;
    
            //
            // Gain pump semaphore
            //
            SeizeFlashPump();
            Init_Flash_Sectors();
    
            Uint32 EntryAddr;
    
            //
            // parameter SCI_BOOT for GPIO84,85; parameter SCI_BOOT_ALTERNATE
            // for GPIO28,29
            //
            EntryAddr = SCI_GetFunction(SCI_BOOT);
    
        }
        /* return(EntryAddr);*/
    
        void(*funcPtr)(void) = (void(*)(void))0x084000;
        (*funcPtr)();
    
        return(0);
    }
    
    CPU1 APP CODE
    void SysInit(void)
    {
    //
    // Step 1. Initialize System Control:
    // PLL, WatchDog, enable Peripheral Clocks
    // This example function is found in the F2837xD_SysCtrl.c file.
    //
        InitSysCtrl();
    
        InitGpio();
    
        #ifdef _STANDALONE
            #ifdef _FLASH
            //
            // Send boot command to allow the CPU2 application to begin execution
            //
            IPCBootCPU2(C1C2_BROM_BOOTMODE_BOOT_FROM_FLASH);
            #else
            //
            // Send boot command to allow the CPU2 application to begin execution
            //
            IPCBootCPU2(C1C2_BROM_BOOTMODE_BOOT_FROM_RAM);
            #endif
        #endif
    
    
    //
    // Step 2. Initialize GPIO:
    // This example function is found in the F2837xD_Gpio.c file and
    // illustrates how to set the GPIO to it's default state.
    //
    
        EALLOW;
        //LED1
        GpioCtrlRegs.GPAPUD.bit.GPIO31 = 1;
        GpioCtrlRegs.GPAMUX2.bit.GPIO31 = 0;
        GpioCtrlRegs.GPADIR.bit.GPIO31 = 1;
        GpioDataRegs.GPACLEAR.bit.GPIO31 = 1;
    
        //LED2 CPU2 controls it
        GPIO_SetupPinOptions(34, GPIO_OUTPUT, GPIO_PUSHPULL);
        GPIO_SetupPinMux(34, GPIO_MUX_CPU2, 0);
    
        /*
        GpioCtrlRegs.GPBPUD.bit.GPIO34 = 1;
        GpioCtrlRegs.GPBMUX1.bit.GPIO34 = 0;
        GpioCtrlRegs.GPBDIR.bit.GPIO34 = 1;
        GpioDataRegs.GPBCLEAR.bit.GPIO34 = 1;
        */
    
        EDIS;
    
        //
    // Step 3. Clear all interrupts and initialize PIE vector table:
    // Disable CPU interrupts
    //
        DINT;
    
    //
    // Initialize the PIE control registers to their default state.
    // The default state is all PIE interrupts disabled and flags
    // are cleared.
    // This function is found in the F2837xD_PieCtrl.c file.
    //
        InitPieCtrl();
    
    //
    // Disable CPU interrupts and clear all CPU interrupt flags:
    //
        IER = 0x0000;
        IFR = 0x0000;
    
    //
    // Initialize the PIE vector table with pointers to the shell Interrupt
    // Service Routines (ISR).
    // This will populate the entire table, even if the interrupt
    // is not used in this example.  This is useful for debug purposes.
    // The shell ISR routines are found in F2837xD_DefaultIsr.c.
    // This function is found in F2837xD_PieVect.c.
    //
        InitPieVectTable();
    
    
        EALLOW;
    
        PieVectTable.ADCA1_INT = &adca1_isr;
        //PieVectTable.EPWM1_INT = &epwm1_isr;
        EDIS;
    
        InitEpwmModules();
        DisablePwmSignals();
    
        SetupAdcModules();
        SetupAdcChannels();
        EnableEpwm1SocA();
    
        SciaInit();
        InitEcap3();
    
        InitPositionSensor();
    
        IER |= M_INT1;
    
        PieCtrlRegs.PIEIER1.bit.INTx1 = 1;  // adca1
    
    //
    // Enable global Interrupts and higher priority real-time debug events:
    //
        EINT;  // Enable Global interrupt INTM
        ERTM;  // Enable Global realtime interrupt DBGM
    
    }
    
    
    CPU2 BOOTLOADER
    uint32_t main(void)
    {
        if (SciaRegs.SCIFFCT.bit.ABD)
        {
            //
            //SCIA Flush
            //
           while(!SciaRegs.SCICTL2.bit.TXEMPTY)
            {
            }
    
            //
            // Step 1. Initialize System Control:
            // Enable Peripheral Clocks
            // This example function is found in the F2837xD_SysCtrl.c file.
            //    InitSysCtrl(); // PLL would be locked by CPU1 and so would be the
                                 // rest of clockinits
    
            //
            // Step 2. Initialize GPIO:
            // This example function is found in the F2837xD_Gpio.c file and
            // illustrates how to set the GPIO to it's default state.
            //
            //InitGpio();
    
            //
            // Step 3. Clear all interrupts and initialize PIE vector table:
            // Disable CPU interrupts
            //
                DINT;
    
            //
            // Initialize the PIE control registers to their default state.
            // The default state is all PIE interrupts disabled and flags
            // are cleared.
            // This function is found in the F2837xD_PieCtrl.c file.
            //
            //    InitPieCtrl();
    
            //
            // Disable CPU interrupts and clear all CPU interrupt flags:
            //
                IER = 0x0000;
                IFR = 0x0000;
    
            //
            // Initialize the PIE vector table with pointers to the shell Interrupt
            // Service Routines (ISR).
            // This will populate the entire table, even if the interrupt
            // is not used in this example.  This is useful for debug purposes.
            // The shell ISR routines are found in F2837xD_DefaultIsr.c.
            // This function is found in F2837xD_PieVect.c.
            //
            //    InitPieVectTable();
    
            //
            // Call Flash Initialization to setup flash waitstates
            // This function must reside in RAM
            //
    
            InitFlash();
    
    
            Uint16 x = 0;
            for(x = 0; x < 32676; x++){}
            for(x = 0; x < 32676; x++){}
    
            IpcRegs.IPCBOOTSTS = C2_BOOTROM_BOOTSTS_SYSTEM_READY;
            while(IpcRegs.IPCBOOTMODE != C1C2_BROM_BOOTMODE_BOOT_FROM_FLASH){}
    
            EINT; //enable global interrupt INTM
            ERTM; //enable global realtime interrupt
    
            //
            // Gain pump semaphore
            //
                SeizeFlashPump();
                Init_Flash_Sectors();
                //put GetFunction here
                uint32_t EntryAddr = SCI_GetFunction();
    
            //
            // Leave control over flash pump
            //
            SignalCPU1();
            //  return EntryAddr; //load entry address of application intob
                              //RPC: return program counter*/
        }
    
        void(*funcPtr)(void) = (void(*)(void))0x084000;
        (*funcPtr)();
    
        return (0);
    }
    
    CPU2 APP CODE
    void SysInit(void)
    {
    //
    // Step 1. Initialize System Control:
    // PLL, WatchDog, enable Peripheral Clocks
    // This example function is found in the F2837xD_SysCtrl.c file.
    //
        InitSysCtrl();
    
    
    //
    // Step 2. Initialize GPIO:
    // This example function is found in the F2837xD_Gpio.c file and
    // illustrates how to set the GPIO to it's default state.
    //
    
    
        //
    // Step 3. Clear all interrupts and initialize PIE vector table:
    // Disable CPU interrupts
    //
        DINT;
    
    //
    // Initialize the PIE control registers to their default state.
    // The default state is all PIE interrupts disabled and flags
    // are cleared.
    // This function is found in the F2837xD_PieCtrl.c file.
    //
        InitPieCtrl();
    
    //
    // Disable CPU interrupts and clear all CPU interrupt flags:
    //
        IER = 0x0000;
        IFR = 0x0000;
    
    //
    // Initialize the PIE vector table with pointers to the shell Interrupt
    // Service Routines (ISR).
    // This will populate the entire table, even if the interrupt
    // is not used in this example.  This is useful for debug purposes.
    // The shell ISR routines are found in F2837xD_DefaultIsr.c.
    // This function is found in F2837xD_PieVect.c.
    //
        InitPieVectTable();
    
    
    
    //
    // Enable global Interrupts and higher priority real-time debug events:
    //
        EINT;  // Enable Global interrupt INTM
        ERTM;  // Enable Global realtime interrupt DBGM
    
    }

    Regards.

  • Hi,

    In your CPU2BOOTLOADER code, shouldn't you be waiting for I2C command from CPU1 for SCI boot. You seem to be waiting for Flash boot.

    Also, you should configure your SCI pins in CPU1 code. It looks like both your bootloader code and application code run InitSysCtrl. This is not required. You can just run InitSysCtrl in bootloader code.

    Regards,
    Manoj
  • Hi Manoj

    I don't want to use sci boot, cpu1 an cpu2 booting from flash. Both of them run first bootloader code, in bootloader code at 0x80000 if detecs ABD bit set then run bootloader, otherwise jump the app code.
    When i try to reprogram CPU1 while CPU2 is working it fails to program load, if cpu2 is stop then successful. So some situations valid for programming CPU2. So how can i stop cpu1 while progamming CPU2?

    Thanks
  • Is this issue resolved?