• State Resolved
  • Locked Locked
  • Replies 1 reply
  • Subscribers 82 subscribers
  • Views 995 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28377S: ADC sampling frequency

Nakon Efekata
Prodigy 120 points
Part Number: TMS320F28377S

Hello,

I would like to set my adc sampling (for audio related sampling) to 44100Hz. Can i reach close enough with internal timers or would it be smart to have an external clock for sampling?

  • 0
    TI__Guru 60865 points
    Hi Nakon,

    The most common ADC triggering timer is the ePWM, which runs at 100MHz. Ideally you would trigger every 100M/44.1k = 2267.574 cycles, but you have to pick an integer number of clock cycles so the actual sampling frequency would be 44.09171kHz.

    You could also use a CPU timer, which runs at 200MHz (but is harder to synchronize with other sources). In this case you could get as close as 44.10143kHz.

    Otherwise you will need to find an XTAL to clock the device at a frequency harmonically related to the intended sample rate or provide an external triggering clock. Note that an external trigger signal will be synchronized to SYSCLK before being passed to the ADC, so while the average sampling rate will be correct, the sampling instant will have at least 1 SYSCLK of jitter. You could also probably implement an interpolation scheme to modulate the trigger period to give an average sample rate of exactly 44.1kHz (but with jitter between any two samples of at least 1 SYSCLK).