• State Resolved
  • Locked Locked
  • Replies 1 reply
  • Subscribers 83 subscribers
  • Views 792 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28075: ECC test mode

user5624527
Intellectual 800 points
Part Number: TMS320F28075


Previously I had been conducting trials with its ECC test mode with the intent to perform simulated ECC errors while executing written functions. Referenced from TRM 2.12.10.3 SECDED Logic Correctness Check.
1) Based on my test, it seems like the ECC test mode is a complete standalone test which does not rely on any main code/program. If that is the case, is my assumption correct that this method cannot be integrated into a written function to test the ECC integrity when running the codes?
2) Is there any method to test the actual ECC feature on the chip rather than the correctness from test modes' calculation. The aim of my project is to test the device's real operation rather than verifying the ECC calculation algorithm.

  • 0
    TI__Guru* 87155 points

    Hi KK,

    1) When ECC test mode is enabled, the SECDED logic that gets tested is the same one that evaluates the data and ECC from the Flash.  However, when ECC test mode is enabled, Flash will be bypassed and hence you can not execute anything from Flash.  The function that uses the ECC test mode should be executed from RAM.  As you correctly understood, inputs to the SECDED logic are driven from the test mode registers and not from the Flash directly.  Idea here is to test the health of the SECDED logic and not the Flash data/ECC.

    2) If you don't want to use the ECC test mode and instead directly want to test the SECDED logic with the direct Flash data and ECC, you can dedicate few locations in the Flash memory for inserting intentional errors.  You can embed Flash API in your application to program intentional errors in those locations.  You can use Fapi_calculateEcc() function to get the correct ECC value for the address and data that you want.  Once you get the ECC, you can insert single or double bit errors (in data or ECC) and program that data+ECC using Fapi_DataAndEcc programming mode.  Please check http://www.ti.com/lit/pdf/spnu629 for more details on these API functions.  At run time, your application can read those locations at periodic intervals to make sure that SECDED logic is catching the intentional errors.

    Thanks and regards,

    Vamsi