TMS320F28377D: 32Mbx16 SDRAM

Dinoisio,

This application note may answer some of your questions.

-Tommy

Viran,

On this specific query -

Could you please help me with the address lines connection?.

In SDRAM mode address are mapped 1-1. BA0/BA1 are used as address for ASYNC mode not SDRAM. So you need to connect A0 of EMIF to A0 of external device.

Regards,

Vivek Singh

Hello.

Thank you for your answers.

I have checked the sprac96 document. But I'm still not sure how to connect the top addresses of the two memory devices to obtain the total capacity of 32M.

Is it necessary to do it using the CS of the memories with some additional hardware to decode the high addresses? or through the DQMH and DQML pins?

I am using EMIF1.

Thanks.

Regars.

Hi,

You may need to use some additional hardware to combine the CS with higher address lines but please note that SDRAM is high frq interface and only one device is supported on this (one chip select - CS0). You need to test this dual-memory setup in all conditions to make sure it is robust.

Regards,
Vivek Singh

Dinoisio,

You should be able to span the two 16b SDRAMs across the 32b data bus on EMIF1.

Map DQM[1:0] + DATA[15:0] to one memory and DQM[3:2] + DATA[31:16] to the second.

-Tommy