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TMS320F28035: Multiple Interrupts, Can't Properly Clear TZCLR

andrew barnett66202
Intellectual 270 points

Part Number: TMS320F28035

I am implementing a Phase Shift Full Bridge converter in PCMC.

Comparator 2 is set to trip DCAEVT1, which sets an interrupt. in my ISR code, I do the following:

EPwm2Regs.TZCLR.bit.OST = 1;
EPwm2Regs.TZCLR.bit.DCAEVT1 = 1;
EPwm2Regs.TZCLR.bit.INT = 1;

This does not clear OST or DCAEVT1, but it does clear INT. I believe this is causing a second interrupt to occur.

Any suggestions as to why OST and DCAEVT1 are not being cleared?

Thanks in advance for any assistance.

  • 0
    TI__Genius 10820 points

    Hi Andrew,

    The TZCLR register is EALLOW protected. Please make sure that you use EALLOW in your code before clearing OST and DCAEVT1 events. Also, make sure that the event/s that caused the OST and DCAEVT1 to activate is/are also not active anymore.

    I hope this helps.

    Hrishi

  • 0 in reply to Hrishi Nene
    Intellectual 270 points
    Hrishi,

    Thank you for thee prompt response.

    EALLOW is properly asserted.

    If the comparator going high triggers the event, and the comparator is still high when I go to clear the TZFLG bits, will this explain my inability to clear the bits?
  • 0 in reply to andrew barnett66202
    TI__Genius 10820 points

    If the comparator going high triggers the event, and the comparator is still high when I go to clear the TZFLG bits, will this explain my inability to clear the bits?

    Yes, this is correct.

    Hrishi

  • 0 in reply to Hrishi Nene
    Intellectual 270 points
    If I disable the comparator before I clear the bits:

    Comp2Regs.COMPCTL.bit.COMPDACEN = 0;
    EPwm2Regs.TZCLR.all |= 0x000C;
    EPwm2Regs.TZCLR.bit.INT = 1;

    This allows the bits to be successfully cleared as it forces the comparator output low (remember that otherwise it's high).

    Is there another means of accompishing this, another register that can be disabled perhaps, as this seems a little brute-force and does introduce some other undesired behaviors.