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TMS320F280049M: Flash programming at Flash Module Controller (FMC)

Part Number: TMS320F280049M


Hi champs.


I have some questions about FMC.

At TRM P121-122

"A single FMC controls both Bank0 and Bank1. The CPU interfaces with the FMC, which in turn interfaces with Bank0 and Bank1 and the shared pump, to perform erase or program operations, to read data, and execute code from these flash banks.

There is a state machine in FMC which generates the erase/program sequences in hardware. This simplifies the Flash API software which configures control registers in the FMC to perform flash erase and program operations. Please refer to the TMS320F28004x Flash API Reference Guide for more information for details on Flash API."

My understands are
1. FMC can execute Flash ERASE and PROGRAM without CPU. (Instruction from CPU)
2. The CPU can execute other instructions while FMC is executing ERASE/PROGRAM.
3. The FMC checks the ECC check bit. But FMC can not do VERIFY executed.
4. Also, even if BANK is the same, FMC can be executed ERASE/PROGRAM when SECTOR is different.
5. FMC interrupts the CPU when execution ERASE/PROGRAM is completed.

Are these correct?

Please tell me if there are other features.


Regards,
Shinji Ueda

  • Ueda-san,

    1. Yes. CPU gives the erase or program command using API. FSM in FMC will take over the operation. CPU can poll for the FSM status.  CPU can take any interrupts while waiting on the FSM to complete the erase/program operation.

    2. CPU can execute other instructions (like ISR) from RAM or from the other bank (if second bank exists).  CPU should not access the bank on which erase or program operation is in progress.

    3. I don't think I understand your question clearly.  If ECC-check is enabled (ECC_ENABLE = 0xA), FMC evaluates ECC when Flash is fetched or read.  Verify should be done when Flash is programmed.  Did this answer your question?  

    4. No. As mentioned above, irrespective of which sector is going through erase/program, access are not allowed to the entire bank.   

    5. This is not supported.

    Thanks and regards,
    Vamsi