CCS/TMS320F28335: warning :1. function "InitEQep1Gpio" declared implicitly,#161-D declaration is incompatible with previous "InitEQep1Gpio" (declared at line 50)

i HAVE TRIED THE ABOVE THE WARINGS ARE NOT REMOVED 

void main(void)
{
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the DSP2833x_SysCtrl.c file.
InitSysCtrl();

// Step 2. Initialize GPIO:
// This example function is found in the DSP2833x_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
InitGpio(); // Skipped for this example

// For this case only init GPIO for eQEP1 and ePWM1
// This function is found in DSP2833x_EQep.c
InitEQep1Gpio();
InitEPwm1Gpio();
EALLOW;

GpioCtrlRegs.GPADIR.bit.GPIO2 = 1; // GPIO4 as output simulates Index signal
GpioDataRegs.GPACLEAR.bit.GPIO2 = 1; // Normally low
EDIS;

// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
DINT;

// Initialize the PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the DSP2833x_PieCtrl.c file.
InitPieCtrl();

// Disable CPU interrupts and clear all CPU interrupt flags:
IER = 0x0000;
IFR = 0x0000;

// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
// This function is found in DSP2833x_PieVect.c.
InitPieVectTable();

// Interrupts that are used in this example are re-mapped to
// ISR functions found within this file.
EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.EPWM1_INT= &prdTick;
PieVectTable.EQEP1_INT= &EQEP1_UTO_ISR;
EDIS; // This is needed to disable write to EALLOW protected registers

// Step 4. Initialize all the Device Peripherals:
initEpwm(); // This function exists in Example_EPwmSetup.c

// Step 5. User specific code, enable interrupts:
// Enable CPU INT1 which is connected to CPU-Timer 0:
IER |= M_INT3;
IER |= M_INT5;

// Enable TINT0 in the PIE: Group 3 interrupt 1
PieCtrlRegs.PIEIER3.bit.INTx1 = 1;
PieCtrlRegs.PIEIER5.bit.INTx1 = 1;
// Enable global Interrupts and higher priority real-time debug events:
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM

// long int new_pos;
//new_pos = EQep1Regs.QPOSLAT;

POSSPEED_Init();

// qep_posspeed.init(&qep_posspeed);

for(;;)
{
count=count;
}
}