• State Resolved
  • Locked Locked
  • Replies 2 replies
  • Subscribers 82 subscribers
  • Views 802 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

CCS/TMS320F28379D: LAUNCHXL-F28379D

Sabina Greenberg101872
Expert 2780 points

Part Number: TMS320F28379D
Other Parts Discussed in Thread: LAUNCHXL-F28379D

Tool/software: Code Composer Studio

Dear support,

We work with LAUNCHXL-F28379D and would like to see SPI gpio on the scope from LAUNCHXL-F28379D board.

We have build spi_loopback_cpu01 example (with _LAUNCHXL_F28379D) with GPIO that could be measured from LAUNCHXL-F28379D :,

J1-7 should show the clock (GPIO60) , J2-14, J2-15 - Data(GPIO59/60)  but we see on the scope nothing.

SpiaRegs.SPICCR.bit.SPILBK = 0;

EALLOW;

 GpioCtrlRegs.GPBPUD.bit.GPIO58 = 0; // Enable pull-up on GPIO16 (SPISIMOA)
GpioCtrlRegs.GPBPUD.bit.GPIO59 = 0; // Enable pull-up on GPIO17 (SPISOMIA)
GpioCtrlRegs.GPBPUD.bit.GPIO60 = 0; // Enable pull-up on GPIO18 (SPICLKA)
GpioCtrlRegs.GPBPUD.bit.GPIO61 = 0; // Enable pull-up on GPIO19 (SPISTEA)

GpioCtrlRegs.GPBQSEL2.bit.GPIO58 = 3; // Asynch input GPIO16 (SPISIMOA)
GpioCtrlRegs.GPBQSEL2.bit.GPIO59 = 3; // Asynch input GPIO17 (SPISOMIA)
GpioCtrlRegs.GPBQSEL2.bit.GPIO60 = 3; // Asynch input GPIO18 (SPICLKA)
GpioCtrlRegs.GPBQSEL2.bit.GPIO61 = 3; // Asynch input GPIO19 (SPISTEA)

GpioCtrlRegs.GPBMUX2.bit.GPIO58 = 15; // Configure GPIO16 as SPISIMOA
GpioCtrlRegs.GPBMUX2.bit.GPIO59 = 15; // Configure GPIO17 as SPISOMIA
GpioCtrlRegs.GPBMUX2.bit.GPIO60 = 15; // Configure GPIO18 as SPICLKA
GpioCtrlRegs.GPBMUX2.bit.GPIO61 = 15; // Configure GPIO19 as SPISTEA

EDIS;

Could you pls help us to find what is the problem here?

(With SpiaRegs.SPICCR.bit.SPILBK = 1; SPI work properly, but we see on the scope nothing )

Thanks, Sabina

  • 0
    Guru 30330 points
    Sabina,

    Please take a look further at the GPIO Pin Mux section of the datasheet. while you have selected the correct GPIO pin to modify, the GPyMUXn register is only a 2 bit field. you can see that it only has a value of 0 to 3. There is an additional field that must be modified- the Group Mux- the GPyGMUXn register. Check out Table 4-3 GPIO Muxed Pins. The header of the table describes the configuration accurately for each of these registers.

    For the GPIOs in question, GPBGMUX2.bit.GPIOxx should be 3, and GPBMUX2.bit.GPIOxx should also be 3. We also offer functions that modify this setting for you so you do not need to worry much about these bits. Please see my response in this thread: e2e.ti.com/.../2393168

    Thanks!
    Mark
  • 0 in reply to Mark Labbato
    Expert 2780 points
    Thanks!!!! it work!
    Thank you very much!
    Sabina