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TMS320F28035: ADC Conversion time Variable with Input

Santhosh Nandakumar
Intellectual 280 points
Part Number: TMS320F28035


Hi All,

I am facing this weird issue with one of my C2000 boards (custom). This board is for a PV charging application.

The code contains a EPWM trigger to ADC and ADCINT1 configured to run CLA TASK 1. ADC is working with 12 channels. The ADC conversion time is measured from EPWM1 ISR entry till CLA TASK 1 entry using a scope.

Condition 1: No PV input... 

ADC conversion time is approx around 2 us. 

Condition 2: I provide PV input 

ADC conversion time seems to slew to 5.5us.

Not able to find a reason why this is happening.... Can the ADC module conversion time be variable based on physical inputs ?

There is no reference to ADC registers else where in code apart from the OVERLFOW and INT flag clearing.... I am providing the ADC init code below...

EALLOW;

AdcRegs.ADCCTL1.bit.ADCBGPWD  = 1;      // Power ADC BG
AdcRegs.ADCCTL1.bit.ADCREFPWD = 1;      // Power reference
AdcRegs.ADCCTL1.bit.ADCPWDN   = 1;      // Power ADC
AdcRegs.ADCCTL1.bit.ADCENABLE = 1;      // Enable ADC
AdcRegs.ADCCTL1.bit.ADCREFSEL = 1;      // Select external
AdcRegs.ADCCTL1.bit.INTPULSEPOS	= 1;	// ADCINT1 trips AFTER results latch
AdcRegs.ADCCTL2.bit.ADCNONOVERLAP = 1;
AdcRegs.ADCCTL2.bit.CLKDIV2EN = 1;
AdcRegs.INTSEL1N2.bit.INT1E     = 1;	// Enable ADCINT1
AdcRegs.INTSEL1N2.bit.INT1CONT  = 1;	// Enable continuous mode
AdcRegs.INTSEL1N2.bit.INT1SEL	= 6;	// EOC6 is trigger for ADCINT1


AdcRegs.ADCSOC0CTL.bit.CHSEL 	= 0;	// A0 >
AdcRegs.ADCSOC1CTL.bit.CHSEL 	= 1;	// A1 >
AdcRegs.ADCSOC2CTL.bit.CHSEL 	= 8;	// B0 > 
AdcRegs.ADCSOC3CTL.bit.CHSEL 	= 9;	// B1 > 
AdcRegs.ADCSOC4CTL.bit.CHSEL 	= 10;// B2 > 
AdcRegs.ADCSOC5CTL.bit.CHSEL 	= 11;// B3 > 
AdcRegs.ADCSOC6CTL.bit.CHSEL 	= 12;// B4 > 
AdcRegs.ADCSOC7CTL.bit.CHSEL 	= 13;// B5 > 

//	Analog Variable readings corresponding to 4 bit Hardware Version

AdcRegs.ADCSOC8CTL.bit.CHSEL    = 7;   // A7 Bit 3 Pin 11
AdcRegs.ADCSOC9CTL.bit.CHSEL    = 3;   // A5 Bit 2 Pin 15
AdcRegs.ADCSOC10CTL.bit.CHSEL   = 4;   // A4 Bit 1 Pin 14
AdcRegs.ADCSOC11CTL.bit.CHSEL   = 5;   // A3 Bit 0 Pin 13

AdcRegs.ADCSOC0CTL.bit.TRIGSEL   = 5;   // EPWM1 SOCA
AdcRegs.ADCSOC1CTL.bit.TRIGSEL   = 5;   // EPWM1 SOCA
AdcRegs.ADCSOC2CTL.bit.TRIGSEL   = 5;   // EPWM1 SOCA
AdcRegs.ADCSOC3CTL.bit.TRIGSEL   = 5;   // EPWM1 SOCA
AdcRegs.ADCSOC4CTL.bit.TRIGSEL   = 5;   // EPWM1 SOCA
AdcRegs.ADCSOC5CTL.bit.TRIGSEL   = 5;   // EPWM1 SOCA
AdcRegs.ADCSOC6CTL.bit.TRIGSEL   = 5;   // EPWM1 SOCA
AdcRegs.ADCSOC7CTL.bit.TRIGSEL   = 5;   // EPWM1 SOCA

//	Analog Variable readings corresponding to 4 bit Hardware Version

AdcRegs.ADCSOC8CTL.bit.TRIGSEL  = 5;    // EPWM1 SOCA
AdcRegs.ADCSOC9CTL.bit.TRIGSEL  = 5;    // EPWM1 SOCA
AdcRegs.ADCSOC10CTL.bit.TRIGSEL = 5;    // EPWM1 SOCA
AdcRegs.ADCSOC11CTL.bit.TRIGSEL = 5;    // EPWM1 SOCA     

AdcRegs.ADCSOC0CTL.bit.ACQPS     = 6;   // minimum S/H Window size
AdcRegs.ADCSOC1CTL.bit.ACQPS     = 6;
AdcRegs.ADCSOC2CTL.bit.ACQPS     = 6;
AdcRegs.ADCSOC3CTL.bit.ACQPS     = 6;
AdcRegs.ADCSOC4CTL.bit.ACQPS     = 6;
AdcRegs.ADCSOC5CTL.bit.ACQPS     = 6;
AdcRegs.ADCSOC6CTL.bit.ACQPS     = 6;
AdcRegs.ADCSOC7CTL.bit.ACQPS     = 6;

//	Analog Variable readings corresponding to 4 bit Hardware Version

AdcRegs.ADCSOC8CTL.bit.ACQPS    = 6;
AdcRegs.ADCSOC9CTL.bit.ACQPS    = 6;
AdcRegs.ADCSOC10CTL.bit.ACQPS   = 6;
AdcRegs.ADCSOC11CTL.bit.ACQPS   = 6;

EDIS;

Thanks in Advance...

Santhosh

  • 0
    TI__Guru 57255 points

    Hi Santhosh,

    You shouldn't see this. 

    You can have the PWM SoC get output through the GPIO mux to a pin (ADCSOCAO/ADCSOCBO) - assuming you have one of these pins free in your custom board.  This would allow you to measure from the SoC generation to the CLA task entry point directly, without involving the CPU at all.  This would at least remove one source of complexity in your measurement.

    I say this because I'm slightly concerned that you may have other CPU ISRs that may be occasionally delaying the start point of your measurement.  Or potentially the cycle count of your main ISR could be longer than that ISR trigger's periodicity.


    Thank you,
    Brett

  • 0 in reply to Brett Larimore
    Intellectual 280 points
    Thanks Brett. I did try this one, thanks to a unused GPIO32 which i mapped to ADCSOCAO.

    What i observe is that, the ADC Conversion time dosent seem to increase (as you suggested)... but the very edge of SOC is moving away from EPWM1 ISR start edge..., which should this happen !!? The config for all ADC channels are provided as EPWM1 SOCA... This is a considerable 3-4us of shift which is critical for the application. Further Guidance would be great...

    Thanks
    Santhosh
  • 0 in reply to Santhosh Nandakumar
    Intellectual 280 points
    Hey Thanks for the support... I solved it yesterday, it was in the code..

    The SOCA was not on EPWM rising edge but it was configured for 6us away from the rising edge using CMPB value.. And this value was changing from CMPB=0 to CMPB=20000 in the code when charging starts, this explained why its behaving different when charging and when not !!

    Nevertheless the inputs on ADCSOCAO probing really helped, thanks.

    Santhosh