F28M36P63C2: uCRCCalculation specifications

Algorithm for using uCRC is described in the TRM. Is the customer looking for more than this ?

• Save the current value of the CRC result register (uCRCRES) into the stack to allow calculation of

CRC in nested interrupt.

• Clear the CRC result register (uCRCRES) by setting the CLEAR field of the uCRCCONTROL register

to ‘1’.

• Configure uCRC polynomials (CRC8, CRC16-P1, CRC16-P2 or CRC32) in the uCRCCONFIG register.

• Read the data from memory locations for which CRC needs to be calculated using mirrored address.

• Read the μCRCRES register to get the calculated CRC value. Pop the last save value of the CRC from

stack and store it into the CRC result register (uCRCRES).

Looking at the questions

1. Initial CRC value?

2. >> Cleared on writing 1 to μCRCCONTROL. CLEAR. Could be initialized to a new value by directly writing to μCRCRES register.

3. Final XOR value?

4. >> We do not have a provision to add a final “XOR value” in hardware.

5. Input reflected?

6. >> I think the question here is whether the bits are reversed, and the answer is that CRC calculation is performed MSB first and LSB last. Note that uCRC will be updated only on byte wide reads.

7. Result reflected?

8. >> Result is not reflected (Bit reversed).