F28M36P63C2: C2000 I2C Master-Receiver mode timing out.

Hi Whitney,

Here is my current code that is running better, but I still get the occasional timeout (but much lest frequently, only 4 timeouts over 48 hours). The big change was I moved the setting of the I2CDXR until after I check for the XRDY and NACK. I also moved to the write all registers at once, just to eliminate possible places of errors.

It occurs when reading just 2 bytes, though I don't record if the timeout happens on the first or second byte. When I look at the data buffer, it does contain non-zero data, so I assume it is being populated at least once, but cannot definitively state that.

void I2C_Read(Uint8 addr, Uint16 regPtr, Uint16 numBytes, Uint16 * data, enum I2C_DEF_ERROR *err, bool msbFirst, Uint32 timeoutMicroSecs)
{
*err = I2C_OK;

DINT;
Uint32 lo = CtoMIpcRegs.MIPCCOUNTERL;
Uint32 hi = CtoMIpcRegs.MIPCCOUNTERH;
EINT;
Uint32 timed_out = 0;

// The Master bit will self clear, so it is a good thing to wait on to ensure
// the bus is free and ready for a new Master
while(I2caRegs.I2CMDR.bit.MST && !(timed_out=I2C_TimedOut(lo, hi, 20000000))) {};

if(timed_out)
{
DbgInfo("Got Timed out in Read TX 1. Status: 0x%x", I2caRegs.I2CSTR.all);
*err = I2C_ERROR_TIMEOUT;
Reset_Bus();
//i2cMutex.Unlock();
return;
}

i2cMutex.Lock();

//I2caRegs.I2CMDR.bit.IRS = 0; // this is needed sometimes, but I would prefer not to reset it all the time

I2caRegs.I2CCNT = 1; // In non-repeat mode (RM = 0), this dictates the number of bytes to send. Just 1 for reading (the register)
I2caRegs.I2CSAR = addr; // The address of the slave device

// I2caRegs.I2CMDR.bit.TRX = 1; // Transmitting data to the slave
// I2caRegs.I2CMDR.bit.MST = 1; // Set the master bit to start the SCL line.
// I2caRegs.I2CMDR.bit.FREE = 1; // Allow I2C to run while in a breakpoint
// I2caRegs.I2CMDR.bit.STP = 0; // Since we are receiving data from the slave, we want to do a repeat-start so disable the Stop bit
// I2caRegs.I2CMDR.bit.STT = 1; // Start a new transaction
// I2caRegs.I2CMDR.bit.IRS = 1; // Pull the I2C out of reset
I2caRegs.I2CMDR.all = 0x6620; // This does the commented lines above in one go

while(!(I2caRegs.I2CSTR.bit.XRDY || I2caRegs.I2CSTR.bit.ARDY) && !(timed_out=I2C_TimedOut(lo, hi, 20000000)));

// Check if we got a No-Acknowledgment
if(I2caRegs.I2CSTR.bit.NACK)
{
DbgInfo("Got NACK in Read SAR TX. Status: 0x%x", I2caRegs.I2CSTR.all);

I2caRegs.I2CMDR.all = 0;
//I2caRegs.I2CMDR.bit.STP = 1; // We need to force a stop condition in this case
I2caRegs.I2CSTR.bit.NACK = 1; // Clear the NACK bit (by writing 1 to it)

*err = I2C_NACK;
i2cMutex.Unlock();
return;
}

if(timed_out)
{
DbgInfo("Got Timed out in Read TX 2. Status: 0x%x", I2caRegs.I2CSTR.all);
*err = I2C_ERROR_TIMEOUT;
I2caRegs.I2CMDR.all = 0;
i2cMutex.Unlock();
return;
}

I2caRegs.I2CDXR = regPtr; // The first data byte to transmit, which is the remote register to address

// Wait for the registers to be free before starting the read phase of the transaction
while(!I2caRegs.I2CSTR.bit.ARDY && !(timed_out=I2C_TimedOut(lo, hi, 20000000)));

if(timed_out)
{
DbgInfo("Got Timed out in Read TX 3. Status: 0x%x", I2caRegs.I2CSTR.all);
*err = I2C_ERROR_TIMEOUT;
I2caRegs.I2CMDR.all = 0;
i2cMutex.Unlock();
return;
}

// Check if we got a No-Acknowledgment
if(I2caRegs.I2CSTR.bit.NACK)
{
DbgInfo("Got NACK in Read TX. Status: 0x%x", I2caRegs.I2CSTR.all);

I2caRegs.I2CMDR.all = 0;
//I2caRegs.I2CMDR.bit.STP = 1; // We need to force a stop condition in this case
I2caRegs.I2CSTR.bit.NACK = 1; // Clear the NACK bit (by writing 1 to it)

*err = I2C_NACK;
i2cMutex.Unlock();
return;
}

//I2caRegs.I2CMDR.all = 0;
I2caRegs.I2CCNT = numBytes; // In non-repeat mode (RM = 0), this dictates the number of bytes to read.
// I2caRegs.I2CMDR.bit.TRX = 0; // We are the Master-receiver, so turn off the transmit bit
// I2caRegs.I2CMDR.bit.MST = 1; // Still the master (probably not needed)
// I2caRegs.I2CMDR.bit.FREE = 1; // Allow I2C to run while in a breakpoint
// I2caRegs.I2CMDR.bit.STP = 1; // Stop bit will be applied after I2CCNT reaches 0
// I2caRegs.I2CMDR.bit.STT = 1; // Repeat start for the receiving part of the transaction
// I2caRegs.I2CMDR.bit.IRS = 1; // Pull the I2C out of reset (probably not needed)
I2caRegs.I2CMDR.all = 0x6C20; // This does the commented lines above in one go

Uint16 i(0);

for(i=0; i < numBytes; i++)
{
while(!(I2caRegs.I2CSTR.bit.RRDY || I2caRegs.I2CSTR.bit.ARDY) && !(timed_out=I2C_TimedOut(lo, hi, 20000000)));

if(timed_out)
{
DbgInfo("Got Timed out in Read RX 1. Status: 0x%x", I2caRegs.I2CSTR.all);
*err = I2C_ERROR_TIMEOUT;
I2caRegs.I2CMDR.all = 0;
break;
}

// Check if we got a No-Acknowledgment
if(I2caRegs.I2CSTR.bit.NACK)
{
DbgInfo("Got NACK in Read RX. Status: 0x%x", I2caRegs.I2CSTR.all);

I2caRegs.I2CMDR.all = 0;
//I2caRegs.I2CMDR.bit.STP = 1; // We need to force a stop condition in this case
I2caRegs.I2CSTR.bit.NACK = 1; // Clear the NACK bit (by writing 1 to it)

*err = I2C_NACK;
break;
}

// Make sure the Receive Ready signal was triggered
while(!I2caRegs.I2CSTR.bit.RRDY && !(timed_out=I2C_TimedOut(lo, hi, 20000000)));

if(timed_out)
{
DbgInfo("Got Timed out in Read RX 2. Status: 0x%x", I2caRegs.I2CSTR.all);
*err = I2C_ERROR_TIMEOUT;
I2caRegs.I2CMDR.all = 0;
break;
}

// Read the next data byte into the buffer, in the appropriate index based on MSB/LSB first.
__byte((int*)data, (msbFirst) ? numBytes - i - 1 : i) = I2caRegs.I2CDRR;
}

i2cMutex.Unlock();
}