TMS320F28027: SPI SLAVE RECEIVE

Ajay,

1. Which documentation are you reading? The SPI User Guide SPRUG71 describes the functionality of the SPI and the FIFO. I can summarize here. The FIFO allows the application to automate the sending/receiving of data without CPU intervention. To transmit, you load the TXFIFO by writing to the SPITXBUF register up to the number of free spaces in the FIFO. if it was empty, the maximum FIFO depth on F2802x is 4 words. The SPI will then load the first word to the transmit shift register and begin shifting the data out bit by bit. once that word is complete, the RX will grab the data from SPIDAT that it shifted in, and copy it to the RX FIFO, which can be read from SPIRXBUF. The SPI will automatically grab the next word in the TX FIFO and begin transmitting that word. This will occur until the FIFO is empty. by setting the interrupts properly, the SPI can interrupt at any programmed fifo depth. if you want to read 4 words, you set the SPIRXINT to trigger at 4 words. If you want to make continuously transmit data you set the SPITXINT to trigger when the FIFO is almost empty (or some intermediate value) to continually reload the FIFO with more data. I hope this makes sense.

2. The SPI is essentially a programmable shift register. when the SPI is transmitting a bit, it will also receive the next bit. If you are sending one word at a time, with the FIFO mode off, you poll the SPIINT bit. this indicates that a full word has been received. This bit gives you two critical pieces of information: 1) The SPI has completed transmitting the last word. you can write to the SPITXBUF to initiate the next transfer. 2) The SPI has received a complete word and it is available to be read from the SPIRXBUF register.

3. as mentioned in the previous bullet, the received data is always read from the SPIRXBUF register. you can poll the SPIINT bit to monitor for a complete transaction and then read SPIRXBUF.

4. I am not quite sure I understand. Maybe seeing the small piece of code where you read the SPIRXBUF will help clear things up. Since the SPIRXBUF is a 16-bit register, you will need to mask off the upper 8 bits of the register if you only want 8-bit words.

Please let me know if you have additional questions.

Thanks,
Mark

Hey Mark,
this is code i am trying and i have disable FIFO and also not using interrupt .i am sending a single data and comparing in salve and sending response depending on comparison result.
""
uint8_t sdata; // send data
uint8_t rdata //receive data

sdata=0x81;
SpiaRegs.SPICTL.bit.TALK = 1; // Enable Transmit path
spi_xmit(sdata << 8); // Master transmits data
while(SpiaRegs.SPISTS.bit.BUFFULL_FLAG == 1); // Waits until data rx’d
dummy = SpiaRegs.SPIRXBUF;
delay_loop();

SpiaRegs.SPICTL.bit.TALK = 0; // for clock is generation
// Disable Transmit path

while(SpiaRegs.SPISTS.bit.BUFFULL_FLAG == 1);
spi_xmit(sdata << 8); // Send dummy to start tx
while(SpiaRegs.SPISTS.bit.INT_FLAG !=1) {} // Wait until data received
// is this bit only use in interrupt mode ?
rdata = SpiaRegs.SPIRXBUF;
delay_loop();
""

Ajay,

Is the above code not working? Your code appears like it should work. You don't necessarily need to manipulate the TALK bit, but it should not affect anything here.

Have you looked at your SPI configuration? verify that you clock phase and polarity bits are set properly. Verify the requirements of the slave with the Chip select. does it need to be inverted? does it need to remain active in between the Command and response phases?

If you are working with less than 16 bits, you should also mask your data read in the receive phase to clear out the upper bits. Pop over to this other thread I am working now. It seems that you both are having similar issues (e2e.ti.com/.../655436)

Dear mark ,
I am getting lot of issue while transmitting and receive in slave mode.do you have any sample code of slave mode transmit and receive ,
Because in sample code there is no code which define proper procedure code to operate in slave mode

Ajay,

It has been a few days since you last replied. Have you been able to get up and running? I have not been able to find the example I was looking for, it may have been on an old laptop that I don't have access to anymore.

Thanks,
Mark