Hi, Champs,
I noticed that we have ADC VREFLO sampling on Soprano with channel 8 and 9, but there's no block diagram shows this on Potenza DS/TRM, however, it seems we documented in DS/TRM on the analog pins and internal connections table that channels 13 will be connected to VREFLO.
So my question is, do we simply configure ADCSOC channel select to 13, then we can sample Vreflo, without any further configuration like Piccolo B does to enable Vreflo bit in ADCCTL1 register?
My customer would like to sample it periodically and do offset calibration across full range temperature to improve ADC accuracy, do you think it works or if you have any other better options?
Best Regards,
Ricky Zhang
