TMS320F28027: Where is Chip Select pin driven low in the SPI example program in controlSUITE

I would like to interface with an SD card. I am modelling the code on the following example:

http://www.ti.com/apps/docs/litabsmultiplefilelist.tsp?literatureNumber=spraao7&docCategoryId=1&appId=270 

sd_card_insertion() is called from main (found in 28xxx_SD_SPI/src/SD_SPI_Initialization.c).

 There, once a card has been inserted, the chip select must be held high while data line out is also held high for 80 cycles:

 GpioDataRegs.GPASET.bit.GPIO19 = 1

for(i=0;i<10;i++){

SpiaRegs.SPITXBUF = byte; //Transmit Byte
while(SpiaRegs.SPISTS.bit.INT_FLAG != 1);
return (SpiaRegs.SPIRXBUF << 8);

}

The program waits forever on while(SpiaRegs.SPISTS.bit.INT_FLAG != 1).

Can you offer any advice?

//#############################################################################
// $TI Release: F2802x Support Library v230 $
// $Release Date: Fri May  8 07:43:05 CDT 2015 $
// $Copyright: Copyright (C) 2008-2015 Texas Instruments Incorporated -
//             <a href="www.ti.com/.../a> ALL RIGHTS RESERVED $
//#############################################################################

#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File

#include "f2802x_common/include/adc.h"
#include "f2802x_common/include/clk.h"
#include "f2802x_common/include/flash.h"
#include "f2802x_common/include/gpio.h"
#include "f2802x_common/include/pie.h"
#include "f2802x_common/include/pll.h"
#include "f2802x_common/include/spi.h"
#include "f2802x_common/include/wdog.h"

// Prototype statements for functions found within this file.
// interrupt void ISRTimer2(void);
void delay_loop(void);
void spi_xmit(uint16_t a);
void spi_fifo_init(void);
void spi_init(void);
void error(void);

ADC_Handle myAdc;
CLK_Handle myClk;
FLASH_Handle myFlash;
GPIO_Handle myGpio;
PIE_Handle myPie;
SPI_Handle mySpi;

uint16_t sdata;  // send data
uint16_t rdata;  // received data

void main(void)
{

    CPU_Handle myCpu;
    PLL_Handle myPll;
    WDOG_Handle myWDog;

    // Initialize all the handles needed for this application
    myAdc = ADC_init((void *)ADC_BASE_ADDR, sizeof(ADC_Obj));
    myClk = CLK_init((void *)CLK_BASE_ADDR, sizeof(CLK_Obj));
    myCpu = CPU_init((void *)NULL, sizeof(CPU_Obj));
    myFlash = FLASH_init((void *)FLASH_BASE_ADDR, sizeof(FLASH_Obj));
    myGpio = GPIO_init((void *)GPIO_BASE_ADDR, sizeof(GPIO_Obj));
    myPie = PIE_init((void *)PIE_BASE_ADDR, sizeof(PIE_Obj));
    myPll = PLL_init((void *)PLL_BASE_ADDR, sizeof(PLL_Obj));
    mySpi = SPI_init((void *)SPIA_BASE_ADDR, sizeof(SPI_Obj));
    myWDog = WDOG_init((void *)WDOG_BASE_ADDR, sizeof(WDOG_Obj));

    // Perform basic system initialization
    WDOG_disable(myWDog);
    CLK_enableAdcClock(myClk);
    (*Device_cal)();

    //Select the internal oscillator 1 as the clock source
    CLK_setOscSrc(myClk, CLK_OscSrc_Internal);

    // Setup the PLL for x10 /2 which will yield 50Mhz = 10Mhz * 10 / 2
    PLL_setup(myPll, PLL_Multiplier_10, PLL_DivideSelect_ClkIn_by_2);

    // Disable the PIE and all interrupts
    PIE_disable(myPie);
    PIE_disableAllInts(myPie);
    CPU_disableGlobalInts(myCpu);
    CPU_clearIntFlags(myCpu);

    // If running from flash copy RAM only functions to RAM
#ifdef _FLASH
    memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);
#endif

    // Initialize GPIO
    GPIO_setPullUp(myGpio, GPIO_Number_16, GPIO_PullUp_Enable);
    GPIO_setPullUp(myGpio, GPIO_Number_17, GPIO_PullUp_Enable);
    GPIO_setPullUp(myGpio, GPIO_Number_18, GPIO_PullUp_Enable);
    GPIO_setPullUp(myGpio, GPIO_Number_19, GPIO_PullUp_Enable);
    GPIO_setQualification(myGpio, GPIO_Number_16, GPIO_Qual_ASync);
    GPIO_setQualification(myGpio, GPIO_Number_17, GPIO_Qual_ASync);
    GPIO_setQualification(myGpio, GPIO_Number_18, GPIO_Qual_ASync);
    GPIO_setQualification(myGpio, GPIO_Number_19, GPIO_Qual_ASync);
    GPIO_setMode(myGpio, GPIO_Number_16, GPIO_16_Mode_SPISIMOA);
    GPIO_setMode(myGpio, GPIO_Number_17, GPIO_17_Mode_SPISOMIA);
    GPIO_setMode(myGpio, GPIO_Number_18, GPIO_18_Mode_SPICLKA);
    GPIO_setMode(myGpio, GPIO_Number_19, GPIO_19_Mode_SPISTEA_NOT);

    // Setup a debug vector table and enable the PIE
    PIE_setDebugIntVectorTable(myPie);
    PIE_enable(myPie);

    spi_init();         // Initialize SPI
    spi_fifo_init();    // Initialize the SPI FIFOs

    sdata = 0x0100;
    SPI_write(mySpi, sdata);

    // Wait until data is received
    while(SPI_getRxFifoStatus(mySpi) == SPI_FifoStatus_Empty)
    {
    }

    rdata = SPI_read(mySpi);
    SPI_write(mySpi, sdata);

    // Wait until data is received
    while(SPI_getRxFifoStatus(mySpi) == SPI_FifoStatus_Empty)
    {
    }

    rdata = (SPI_read(mySpi)&  0xff);

     while(1);
}

void error(void)
{
    __asm(" ESTOP0");     // Test failed!! Stop!
    for (;;)
    {
    }
}

void spi_init()
{
    CLK_enableSpiaClock(myClk);

    // Reset on, rising edge, 16-bit char bits
    SPI_setCharLength(mySpi, SPI_CharLength_16_Bits);

    // Enable master mode, normal phase,
    // enable talk, and SPI int disabled.
    SPI_setMode(mySpi, SPI_Mode_Master);
    SPI_setClkPhase(mySpi, SPI_ClkPhase_Delayed);
    SPI_enableTx(mySpi);

    SPI_setBaudRate(mySpi, 30);

    // Relinquish SPI from Reset
    //SPI_enableLoopBack(mySpi);
    SPI_enable(mySpi);

    // Set so breakpoints don't disturb xmission
    SPI_setPriority(mySpi, SPI_Priority_FreeRun);

    return;
}

void spi_fifo_init()
{
    // Initialize SPI FIFO registers
    SPI_enableChannels(mySpi);
    SPI_enableFifoEnh(mySpi);
    SPI_resetTxFifo(mySpi);
    SPI_clearTxFifoInt(mySpi);
    SPI_resetRxFifo(mySpi);
    SPI_clearRxFifoInt(mySpi);
    SPI_setRxFifoIntLevel(mySpi, SPI_FifoLevel_4_Words);

    return;
}

//===========================================================================
// No more.
//===========================================================================

I see--since your application has very specific timing requirements about the chip select, you will need to use a GPIO that you set and clear by software instead of the hardware-controlled chip select. That's what the example code in that application note does.

Are you running the code from that application note as is, or have you made some changes? Is GPIO19 being properly configured as a GPIO output?

Whitney

CCS is not recognizing the project. Should I try incorporating the parts of the code into a new project? Would it work? 

 

The code in the original post correctly read a register on a device (as a sanity check). With the following initialization, the program blocks on the same while loop:

  EALLOW;
   /* Enable internal pull-up for the selected pins */
   // Pull-ups can be enabled or disabled by the user.
   // This will enable the pullups for the specified pins.
   // Comment out other unwanted lines.

       GpioCtrlRegs.GPAPUD.bit.GPIO16 = 0;   // Enable pull-up on GPIO16 (SPISIMOA)
       GpioCtrlRegs.GPAPUD.bit.GPIO17 = 0;   // Enable pull-up on GPIO17 (SPISOMIA)
       GpioCtrlRegs.GPAPUD.bit.GPIO18 = 0;   // Enable pull-up on GPIO18 (SPICLKA)
       GpioCtrlRegs.GPAPUD.bit.GPIO19 = 0;   // Enable pull-up on GPIO19 (SPISTEA)


   /* Set qualification for selected pins to asynch only */
   // This will select asynch (no qualification) for the selected pins.
   // Comment out other unwanted lines.

       GpioCtrlRegs.GPAQSEL2.bit.GPIO16 = 3; // Asynch input GPIO16 (SPISIMOA)
       GpioCtrlRegs.GPAQSEL2.bit.GPIO17 = 3; // Asynch input GPIO17 (SPISOMIA)
       GpioCtrlRegs.GPAQSEL2.bit.GPIO18 = 3; // Asynch input GPIO18 (SPICLKA)
   //    GpioCtrlRegs.GPAQSEL2.bit.GPIO19 = 3; // Asynch input GPIO19 (SPISTEA)

   /* Configure SPI-A pins using GPIO regs*/
   // This specifies which of the possible GPIO pins will be SPI functional pins.
   // Comment out other unwanted lines.

       GpioCtrlRegs.GPAMUX2.bit.GPIO16 = 1; // Configure GPIO16 as SPISIMOA
       GpioCtrlRegs.GPAMUX2.bit.GPIO17 = 1; // Configure GPIO17 as SPISOMIA
       GpioCtrlRegs.GPAMUX2.bit.GPIO18 = 1; // Configure GPIO18 as SPICLKA
   //    GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 1; // Configure GPIO19 as SPISTEA
       GpioCtrlRegs.GPADIR.bit.GPIO19 = 1;
       GpioDataRegs.GPASET.bit.GPIO19 = 1;
       EDIS;

       //init spi

       SpiaRegs.SPICCR.all =0x000f;        //Reset off, rising edge, 16-bit char bits
          SpiaRegs.SPICTL.all =0x000E;        //Enable master mode, delayed phase,
                                              //enable talk, and SPI int disabled.
          SpiaRegs.SPIBRR =0x0063;
          SpiaRegs.SPICCR.all =0x008f;        //Relinquish SPI from Reset
          SpiaRegs.SPIPRI.bit.FREE = 1;


    // Setup a debug vector table and enable the PIE
    PIE_setDebugIntVectorTable(myPie);
    PIE_enable(myPie);

    GpioDataRegs.GPACLEAR.bit.GPIO19 = 1; //cs low

    SpiaRegs.SPITXBUF = 0x0100;                   //Transmit Byte
    while(SpiaRegs.SPISTS.bit.INT_FLAG != 1);   //Wait until the RXBUF has received last bit
    rdata =  SpiaRegs.SPIRXBUF ;

    SpiaRegs.SPITXBUF = 0x0100;                   //Transmit Byte
    while(SpiaRegs.SPISTS.bit.INT_FLAG != 1);   //Wait until the RXBUF has received last bit
    rdata =  SpiaRegs.SPIRXBUF ;

    GpioDataRegs.GPASET.bit.GPIO19 = 1;// cs high

It looks like the project is meant for an old version of CCS. I think creating a new project and adding the example files to it is probably the way to go.

Set GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 0 just in case. Otherwise, the rest of your GPIO initialization looks good.

I don't see anything wrong with your SPI configuration that would result in the INT_FLAG not getting set. Are you calling InitSysCtrl() at the beginning of the application to configure the clocks?

Do you have an oscilloscope or logic analyzer you could use to observe that activity on the signals?

Whitney

I don't have much experience with CSS. Is it possible to import only the files needed instead of all files?

I am not working with an oscilloscope, only the debugger.

most of the registers referenced in the initialization functions are not recognized:

void InitPeripheralClocks(void)
{
   EALLOW;

// HISPCP/LOSPCP prescale register settings, normally it will be set to default values
   SysCtrlRegs.HISPCP.all = 0x0001;     //SYSCLKOUT/2
   SysCtrlRegs.LOSPCP.all = 0x0001;     //SYSCLKOUT/2

// XCLKOUT to SYSCLKOUT ratio.  By default XCLKOUT = 1/4 SYSCLKOUT
   SysCtrlRegs.XCLK.bit.XCLKOUTDIV=2;

// Peripheral clock enables set for the selected peripherals.
// If you are not using a peripheral leave the clock off
// to save on power.
//
// Note: not all peripherals are available on all 280x derivates.
// Refer to the datasheet for your particular device.
//
// This function is not written to be an example of efficient code.

   SysCtrlRegs.PCLKCR0.bit.ADCENCLK = 1;    // ADC
   SysCtrlRegs.PCLKCR0.bit.I2CAENCLK = 1;   // I2C
   SysCtrlRegs.PCLKCR1.bit.ECAP1ENCLK = 1;  // eCAP1
   SysCtrlRegs.PCLKCR1.bit.ECAP2ENCLK = 1;  // eCAP2
   SysCtrlRegs.PCLKCR1.bit.EPWM1ENCLK = 1;  // ePWM1
   SysCtrlRegs.PCLKCR1.bit.EPWM2ENCLK = 1;  // ePWM2
   SysCtrlRegs.PCLKCR1.bit.EPWM3ENCLK = 1;  // ePWM3
   SysCtrlRegs.PCLKCR0.bit.SCIAENCLK = 1;   // SCI-A
   SysCtrlRegs.PCLKCR0.bit.SPIAENCLK = 1;   // SPI-A

   if(DevEmuRegs.PARTID.bit.PARTNO != PARTNO_28015 &&
      DevEmuRegs.PARTID.bit.PARTNO != PARTNO_28016)
   {
      SysCtrlRegs.PCLKCR1.bit.EQEP1ENCLK = 1;  // eQEP1
      SysCtrlRegs.PCLKCR0.bit.SPIBENCLK = 1;   // SPI-B
   }

   if(DevEmuRegs.PARTID.bit.PARTNO != PARTNO_2801 &&
      DevEmuRegs.PARTID.bit.PARTNO != PARTNO_2802)
   {
       SysCtrlRegs.PCLKCR1.bit.EPWM4ENCLK = 1;  // ePWM4
   }

   if(DevEmuRegs.PARTID.bit.PARTNO != PARTNO_28015)
   {
      SysCtrlRegs.PCLKCR0.bit.ECANAENCLK=1;    // eCAN-A
   }

   if(DevEmuRegs.PARTID.bit.PARTNO == PARTNO_2809 ||
      DevEmuRegs.PARTID.bit.PARTNO == PARTNO_2808 ||
      DevEmuRegs.PARTID.bit.PARTNO == PARTNO_2806 )
   {
       SysCtrlRegs.PCLKCR1.bit.ECAP3ENCLK = 1;  // eCAP3
       SysCtrlRegs.PCLKCR1.bit.ECAP4ENCLK = 1;  // eCAP4
       SysCtrlRegs.PCLKCR1.bit.EPWM5ENCLK = 1;  // ePWM5
       SysCtrlRegs.PCLKCR1.bit.EPWM6ENCLK = 1;  // ePWM6
       SysCtrlRegs.PCLKCR0.bit.SCIBENCLK = 1;   // SCI-B
       SysCtrlRegs.PCLKCR0.bit.SPICENCLK = 1;   // SPI-C
       SysCtrlRegs.PCLKCR0.bit.SPIDENCLK = 1;   // SPI-D
       SysCtrlRegs.PCLKCR1.bit.EQEP2ENCLK = 1;  // eQEP2

   }
   if(DevEmuRegs.PARTID.bit.PARTNO == PARTNO_2808 ||
      DevEmuRegs.PARTID.bit.PARTNO == PARTNO_2809)
   {
       SysCtrlRegs.PCLKCR0.bit.ECANBENCLK=1;    // eCAN-B
   }

   SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;       // Enable TBCLK within the ePWM

   EDIS;
}
void InitPll(Uint16 val, Uint16 clkindiv)
{
   volatile Uint16 iVol;

   // Make sure the PLL is not running in limp mode
   if (SysCtrlRegs.PLLSTS.bit.MCLKSTS != 0)
   {
      // Missing external clock has been detected
      // Replace this line with a call to an appropriate
      // SystemShutdown(); function.
      asm("        ESTOP0");
   }

   // CLKINDIV MUST be 0 before PLLCR can be changed from
   // 0x0000. It is set to 0 by an external reset XRSn
   if (SysCtrlRegs.PLLSTS.bit.CLKINDIV != 0)
   {
       SysCtrlRegs.PLLSTS.bit.CLKINDIV = 0;
   }

   // Change the PLLCR
   if (SysCtrlRegs.PLLCR.bit.DIV != val)
   {

      EALLOW;
      // Before setting PLLCR turn off missing clock detect logic
      SysCtrlRegs.PLLSTS.bit.MCLKOFF = 1;
      SysCtrlRegs.PLLCR.bit.DIV = val;
      EDIS;

      // Optional: Wait for PLL to lock.
      // During this time the CPU will switch to OSCCLK/2 until
      // the PLL is stable.  Once the PLL is stable the CPU will
      // switch to the new PLL value.
      //
      // This time-to-lock is monitored by a PLL lock counter.
      //
      // Code is not required to sit and wait for the PLL to lock.
      // However, if the code does anything that is timing critical,
      // and requires the correct clock be locked, then it is best to
      // wait until this switching has completed.

      // Wait for the PLL lock bit to be set.
      // Note this bit is not available on 281x devices.  For those devices
      // use a software loop to perform the required count.

      // The watchdog should be disabled before this loop, or fed within
      // the loop via ServiceDog().

      // Uncomment to disable the watchdog
      DisableDog();

      while(SysCtrlRegs.PLLSTS.bit.PLLLOCKS != 1)
      {
          // Uncomment to service the watchdog
          // ServiceDog();
      }

      EALLOW;
      SysCtrlRegs.PLLSTS.bit.MCLKOFF = 0;
      SysCtrlRegs.PLLSTS.bit.CLKINDIV != clkindiv;
      EDIS;
    }
}

were the initializations in the original post not correct in configuring the clocks?