I was originally using SPI Interrupts to receive data from the SPI. This worked correctly.
I'm trying to switch to reading the SPI C receive buffer using DMA. The DMA appears not to be writing the data to my variable memory.
I configured everything and in debug I can see the shadow registers pointing to my variable location in memory but the data remains zero.
I can also see data arriving in debug to the SpicRegs.SPIRXBUF. And the RXFFST register will increase and decrease to the RXFFIL level.
It also correctly triggers an interrupt which is set to trigger at the end of the DMA transfer.
Here is my code:
//DMA Configuration file
#define BURST (FIFO_LVL-1) // burst size should be less than 8 #define TRANSFER 0 // [(MEM_BUFFER_SIZE/FIFO_LVL)-1] #define FIFO_LVL 2 // FIFO Interrupt Level volatile Uint16 *DMADest; void dma_init() { // // Initialize DMA // DMAInitialize(); DMADest = (volatile Uint16 *)rdata; DMACH1AddrConfig(DMADest,&SpicRegs.SPIRXBUF); DMACH1BurstConfig(BURST,0,1); // Burst size, src step, dest step DMACH1TransferConfig(TRANSFER,0,1); // transfer size, src step, dest step DMACH1ModeConfig(DMA_SPICRX,PERINT_ENABLE,ONESHOT_DISABLE,CONT_ENABLE, SYNC_DISABLE,SYNC_SRC,OVRFLOW_DISABLE,SIXTEEN_BIT, CHINT_END,CHINT_ENABLE); }
//Interrupt in ISR file
__interrupt void local_D_INTCH1_ISR(void) { EALLOW; // NEED TO EXECUTE EALLOW INSIDE ISR !!! //DmaRegs.CH6.CONTROL.bit.HALT = 1; PieCtrlRegs.PIEACK.all |= PIEACK_GROUP7; // ACK to receive more interrupts // from this PIE group EDIS; CPU2CLA_Vctrl = (signed long)rdata[0]; //Vctrl_Test = (signed long)rdata[0]; return; }
//Variable Declared in Global File
EXTERN_DEC volatile Uint16 rdata[2];
EDIT to include SPI Configuration
//SPI Configuration
//SPICCR Registers SpicRegs.SPICCR.bit.SPISWRESET = 0; SpicRegs.SPICCR.bit.SPICHAR = 0xF; //16-bit characters SpicRegs.SPICCR.bit.CLKPOLARITY = 0; //Clock polarity (data out on rising clock edge) //SPICTL Reigsters SpicRegs.SPICTL.bit.MASTER_SLAVE = 0; //Configure as a slave to transmit on SPISOMIA SpicRegs.SPICTL.bit.CLK_PHASE = 0; //Clock phase, half cycle offset SpicRegs.SPICTL.bit.TALK = 0; //Disable data transmit via SPI SpicRegs.SPICTL.bit.SPIINTENA = 0; //Enable SPI interrupts //SPIPRI Registers SpicRegs.SPIPRI.bit.STEINV = 0; //SPISTE bar acitve low SpicRegs.SPIPRI.bit.TRIWIRE = 0; //Normal 4 wire operation //SPICCR Register to enable high speed mode (50MHz max clock) SpicRegs.SPICCR.bit.HS_MODE = 1; //SPIFFTX Registers SpicRegs.SPIFFTX.bit.SPIFFENA = 1; //Enable FIFO functionality //SPIFFRX Registers SpicRegs.SPIFFRX.bit.RXFFIENA = 1; //Enable FIFO RX interrupts SpicRegs.SPIFFRX.bit.RXFFIL = 0x2; //2 words received before interrupt is generated //SPIBRR Registers SpicRegs.SPIBRR.all = 0; //Set Baud rate to max rate SpicRegs.SPIFFTX.bit.SPIRST = 1; SpicRegs.SPIFFTX.bit.TXFIFO = 1; SpicRegs.SPIFFRX.bit.RXFIFORESET = 1; //Enable FIFO functionality SpicRegs.SPIFFTX.bit.TXFFINTCLR = 1; SpicRegs.SPICCR.bit.SPISWRESET = 1;