F28M35H52C: Several Questions About A/D Converter Peripheral

Thanks for reaching out to TI, answers following their respective question(s) below:

1. Neither device data sheet, SPRS742J, nor Technical Reference Manual, SPRUH22H, provides detailed information on internal reference voltage generator except indirectly specifying 3.3V as its output value. Is +3.3V indeed an internal reference value?

A1)The internal reference for the ADC is maintained at a voltage to support a Full Scale Range(FSR) of 0 - 3.3V.

2. Is there any impact that device's power voltages, i.e. +3.3V, +1.8V, and +1.2V, might have on internal reference? Will variations in the values of any of these power voltages have any adverse effect such as clamping, limiting, or otherwise preventing the internal reference from reaching its nominal value?

A2)There is no impact, so long as the supply voltages are kept within the tolerances listed in the datasheet, the ADC will meet the electrical characteristics specified in the datasheet(INL/DNL/Gain/Offset/etc)

3. Would it be possible to share more specification-related information such as initial tolerance of the reference value, temperature and age-related drift, overall non-linearity, ENOB of ADC peripheral with internal reference, etc?

A3)The main effect of any internal reference movement is a change in gain error. The dominant factor for internal reference movement is the device temperature. This is approximated with the trend line shown in Figure 5-12 as a typical guide. The is the typical behavior, but in any case the max/min for gain error(or any specification) will be met over the full operational conditions of the device. This is inclusive of aging, with an assumption of 10 years of continuous power on hours at 105C. There is a TI application note on how to scale this lifetime based on different temperature/power on profiles for a given end system.

Other parameters, such as ENOB and linearity are not measurably impacted by this normal movement of the internal reference.

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Regarding architecture of the A/D, Figure 10.1, Analog Subsystem Block Diagram, in the Technical Reference Manual (SPRUH22H, section 10.1, p.852) shows that inputs ADC1INA0 and ADC1INA1 are hardwired to the inputs ADC2INA1 and ADC2INA0 respectively. Similar configuration is shown for the inputs ADC1INB0, ADC1INB1 and ADC2INB1, ADC2INB0. The note below the figure specifically brings attention to this fact. However, Figure 5.11, ADC, in the device datasheet (SPRS742J, p.61) lists inputs ADCINA1 and ADCINB1 as 'N/C'. My questions are below.

4. Based on the facts above, is that a contradiction between respective device datasheet, SPRS742J, and Technical Reference Manual, SPRUH22H, regarding inputs ADCINA1 and ADCINB1? Or does 'N/C' signify absence of external connectivity and constitute internal usage only, as per Technical Reference Manual, SPRUH22H?

A4)"N/C" indicates a lack of external connectivity in this case, but as you said the physical channels are still present at the boundary of the analog module inside the physical device.

5. What results would be returned if ADCINA1 or ADCINB1 conversion is attempted? Will there be a denial of the conversion at all, or will the results be undefined and arbitrary, or will results be the actual reads based on internal connectivity as per Figure 10.1, Analog Subsystem Block Diagram, in the Technical Reference Manual (SPRUH22H, section 10.1, p.852)?

A5)The reads would be based on the internal connectivity as per Figure 10.1, in such case ADC1_INA1 would return the value on the ADC2_INA0 pin, etc. The intent of this connection is to allow the user to have a physical link between ADC1 and ADC2. The ADCs have their own reference internal references, and as such may have different gain/offset values at a given temperature point.

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And now some questions with regard to ADC operating with external reference.

Section 10.3.3.3, Channel Selection, in the Technical Reference Manual, (SPRUH22H, p.861) says in particular, "ADCINA0 is shared with VREFHI, and therefore cannot be used as a variable input source when using external reference voltage mode". End of citation. On other side, according to the device datasheet (SPRS742J, Figure 4-1, 144-Pin RFP PowerPAD Thermally Enhanced Thin Quad Flatpack (Top View), p.10), there are pins 120, ADC1VREFHI, and 133, ADC2VREFHI, which seem to be specifically provided for VREFHI connectivity.

6. Is there a contradiction between the two documents?

A6)SPRUH22H is incorrect in its note about ADCINA0 shared with VREFHI, the datasheet is correct that on this device there is a separate pin for ADC1/2VREFHI respectively. I'll follow up to make sure SPRUH22H get corrected.

7. Also, if ADCINA0 is really shared with VREFHI, what's an intended purpose of doing so? If any voltage is converted while simultaneously used as an external reference, the conversion result should always be the full scale, i.e. 0xFFF, regardless of the actual voltage value, which seems to have no practical use. Or does ADC use some other reference voltage when ADCINA0 conversion is called out? So, again, why? Please clarify this moment for me.

A7)Even though in this case it is not applicable(per above); I believe this was an accidental carry over from another device with the same ADC but much fewer pins, where we wanted to give the option of having an external reference with the trade-off being sacrificing an ADC input channel. Again, this is not the case here, rather the documentation being incorrect.

Best regards,

Matt