Tool/software: TI C/C++ Compiler
Hi,
I am using TMS320F28075 Microcontroller. I have DC voltage sensing through ADC A2. also used PWM1A,1B. I want to trip (low) both the pwm when DC voltage adc count is go above 3500. For that I have used Compare module . I have done the following coding for the same.
// CMPSs init
Cmpss1Regs.COMPCTL.bit.ASYNCHEN = 0; // Synchronous trip for high comparator
Cmpss1Regs.COMPCTL.bit.CTRIPHSEL = 3; // Use filtered and latched trip for high comparator
Cmpss1Regs.COMPCTL.bit.COMPHINV = 0; // Trip when value > DAC for high comparator
Cmpss1Regs.COMPCTL.bit.COMPHSOURCE = 0; // Compare with DAC value for high comparator
Cmpss1Regs.COMPHYSCTL.bit.COMPHYS = 1; // Typical hysteresis for comparator
Cmpss1Regs.COMPSTSCLR.bit.HSYNCCLREN = 0; // PWMSYNC will not reset latch for high comparator
Cmpss1Regs.COMPSTSCLR.bit.HLATCHCLR = 1; // Clear latch for high comparator now
Cmpss1Regs.COMPDACCTL.bit.SWLOADSEL = 0; // DAC value updated on SYSCLK
Cmpss1Regs.COMPDACCTL.bit.SELREF = 0; // VDDA used as DAC reference
Cmpss1Regs.COMPDACCTL.bit.DACSOURCE = 0; // Ramp generator not used
Cmpss1Regs.DACHVALS.bit.DACVAL = 4000;
// Cmpss1Regs.CTRIPLFILCTL.bit.FILINIT = 1; // Initialize all data in filter to input value
// Cmpss1Regs.CTRIPLFILCTL.bit.THRESH = VOTE_MAJ; // Number of high samples in window for trip
// Cmpss1Regs.CTRIPLFILCTL.bit.SAMPWIN = VOTE_WIN; // Number of samples in voting window = SAMPWIN+1
// Cmpss1Regs.CTRIPLFILCLKCTL.bit.CLKPRESCALE = 0; // No prescaling of SYSCLK used
Cmpss1Regs.CTRIPHFILCTL.bit.FILINIT = 1; // Initialize all data in filter to input value
Cmpss1Regs.CTRIPHFILCTL.bit.THRESH = VOTE_MAJ; // Number of high samples in window for trip
Cmpss1Regs.CTRIPHFILCTL.bit.SAMPWIN = VOTE_WIN; // Number of samples in voting window = SAMPWIN+1
Cmpss1Regs.CTRIPHFILCLKCTL.bit.CLKPRESCALE = 0; // No prescaling of SYSCLK used
Cmpss1Regs.COMPLOCK.bit.CTRIP = 1; // Lock CTRIP registers
Cmpss1Regs.COMPLOCK.bit.DACCTL = 1; // Lock DACCTL registers
Cmpss1Regs.COMPLOCK.bit.COMPHYSCTL = 1; // Lock COMPHYSCTL registers
Cmpss1Regs.COMPLOCK.bit.COMPCTL = 1; // Lock COMPCTL registers
// PWM init
EPwm1Regs.TZSEL.bit.DCBEVT2 = TZ_ENABLE; // One shot trip on DCBEVT1
EPwm1Regs.TZSEL.bit.DCAEVT2 = TZ_ENABLE; // One shot trip on DCAEVT1
EPwm1Regs.TZCTL.bit.DCBEVT2 = TZ_FORCE_LO; // Force low on DCBEVT1
EPwm1Regs.TZCTL.bit.DCAEVT2 = TZ_FORCE_LO; // Force low on DCAEVT1
EPwm1Regs.DCBCTL.bit.EVT2SRCSEL = DC_EVT2; // EVT1 source for DCB
EPwm1Regs.DCACTL.bit.EVT2SRCSEL = DC_EVT2; // EVT1 source for DCA
EPwm1Regs.DCBCTL.bit.EVT2FRCSYNCSEL = DC_EVT_ASYNC; // Asynchronous use of event
EPwm1Regs.DCACTL.bit.EVT2FRCSYNCSEL = DC_EVT_ASYNC; // Asynchronous use of event
EPwm1Regs.TZDCSEL.bit.DCBEVT2 = TZ_DCBH_HI; // Event on DCBH->high
EPwm1Regs.TZDCSEL.bit.DCAEVT2 = TZ_DCAH_HI; // Event on DCAH->high
EPwm1Regs.DCTRIPSEL.bit.DCBHCOMPSEL = 0; // DCBH on trip combo
EPwm1Regs.DCTRIPSEL.bit.DCAHCOMPSEL = 0; // DCAH on trip combo
EPwm1Regs.DCBHTRIPSEL.bit.TRIPINPUT4 = 1;
EPwm1Regs.DCAHTRIPSEL.bit.TRIPINPUT4 = 1; // Trip 4 used (phase overcurrent)
With this setting I get PWM low always even my DC voltage is less.Is the Initialisation is correct for the PWM and CMPSS
Regards,
Sagar
