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TMDSSOLARUINVKIT: GEN_SIN_COS Module maximizing output waveform frequency

Part Number: TMDSSOLARUINVKIT
Other Parts Discussed in Thread: AFE031

Hi,

Is it possible to get an 85KHz sine wave output with the C2000 Piccolo F28035 MCU (60MHz) that comes with this inverter kit? I'm using the GEN_SIN_COS.asm module. I've got it up to around 50kHz to 60kHz and can't seem to get higher.

-SYSTEM CLOCK is set to 60MHz 'PLLset(0xC);'

-running open loop

-switching frequency: 50 cycles per PWM period or 1.2MHz

-control loop period: 100 cycles (can maybe go a little less but at 50 cycles the output is no longer a sinusoidal)

-dwPll_Trace_Freq/GEN_SIN_COS_Ws: is set to 2^31-1

-dwPll_Sample_Time/GEN_SIN_COS_Ts: is set to 2^16 or so, initially increasing this increased the output frequency but above 2^16 it stopped having an effect

Here is the assembly for the module.

;----------------------------------------------------------------------------------
;	FILE:			GEN_SIN_COS.asm
;
;	Description:	Generate the sine and cos wave for PLL and inverter trace angle
;
;	Version: 		2.0
;
;   Target:  		F2802x / F2803x
;
;--------------------------------------------------------------------------------
;  Copyright Texas Instruments  2010
;--------------------------------------------------------------------------------
;  Revision History:
;--------------------------------------------------------------------------------
;  Date	  	| Description
;--------------------------------------------------------------------------------
;  06/15/10	| Release 2.0  		New release.
;--------------------------------------------------------------------------------
;=============================
GEN_SIN_COS_INT 	.macro	n
;=============================
; allocate memory space for data & terminal pointers
_GEN_SIN_COS_Sin_0			.usect "GEN_Sin_Cos_Section",2,1,1		;Q22
_GEN_SIN_COS_Sin_1			.usect "GEN_Sin_Cos_Section",2,1,1
_GEN_SIN_COS_Cos_0			.usect "GEN_Sin_Cos_Section",2,1,1
_GEN_SIN_COS_Cos_1			.usect "GEN_Sin_Cos_Section",2,1,1
_GEN_SIN_COS_Max  	.usect "GEN_Sin_Cos_Section",2,1,1
_GEN_SIN_COS_Min  	.usect "GEN_Sin_Cos_Section",2,1,1
_GEN_SIN_COS_Ws		.usect "GEN_Sin_Cos_Section",2,1,1		;Q20
_GEN_SIN_COS_Ts	.usect "GEN_Sin_Cos_Section",2,1,1		;Q24
_dwSin_Cos_Temp		.usect "GEN_Sin_Cos_Section",2,1,1		

;Publish Terminal Pointers for access from the C environment
		
		.def 	_GEN_SIN_COS_Sin_0			 
		.def	_GEN_SIN_COS_Sin_1			 
		.def	_GEN_SIN_COS_Cos_0			 
		.def	_GEN_SIN_COS_Cos_1			 
		.def	_GEN_SIN_COS_Max  	 
		.def	_GEN_SIN_COS_Min  	 
		.def	_GEN_SIN_COS_Ws
		.def	_GEN_SIN_COS_Ts		 

						
; set terminal pointer to ZeroNet
		MOVL	XAR2, #ZeroNet
		MOVW	DP, #_GEN_SIN_COS_Sin_0
		MOVL	@_GEN_SIN_COS_Sin_0, XAR2
		MOVL	@_GEN_SIN_COS_Sin_1, XAR2
		MOVL	@_GEN_SIN_COS_Cos_0, XAR2
		MOVL	@_GEN_SIN_COS_Cos_1, XAR2
		MOVL	@_GEN_SIN_COS_Max, XAR2
		MOVL	@_GEN_SIN_COS_Min, XAR2
		MOVL	@_GEN_SIN_COS_Ws, XAR2
		MOVL	@_GEN_SIN_COS_Ts, XAR2
		
		.endm

;-------------------------------------------------------------------------------------------
;=============================
GEN_SIN_COS	.macro	n
;=============================

		MOVW     DP, #_GEN_SIN_COS_Sin_0		;load DP pointer with page value containing _GEN_SIN_COS_SIN_0
		MOVL     XAR0,@_GEN_SIN_COS_Ws			;load XAR0 with pointer to _GEN_SIN_COS_Ws (Q20)
		MOVL     XAR1,@_GEN_SIN_COS_Ts			;load XAR1 with pointer to _GEN_SIN_COS_Ts (Q24)
		MOVL     XAR2,@_GEN_SIN_COS_Sin_0		;load XAR2 with pointer to _GEN_SIN_COS_Sin_0 (Q22)
		MOVL     XAR3,@_GEN_SIN_COS_Cos_0		;load XAR3 with pointer to _GEN_SIN_COS_Cos_0 (Q22)
		
		MOVL     XT,*XAR0						;load XT with location pointed to by XAR0
		IMPYL    P,XT,*XAR1						;signed 32x32bit multiply, P is product (the signed lower 32 bits)
		QMPYL    ACC,XT,*XAR1					;upper 32 bits
		LSL64    ACC:P,#8						;logical left shift 8bits? (ACC = Ws*Ts , ACC->Q20)
		MOVL     @_dwSin_Cos_Temp,ACC			;Temp = Ws*Ts
		
		MOVL     @XT,ACC						;XT = Ws*Ts
		IMPYL    P,XT,*XAR2						;P = Ws*Ts*Sin_0[31:0]
		QMPYL    ACC,XT,*XAR2					;ACC = Ws*Ts*Sin_0[63:32]
		LSL64    ACC:P,#12						; ACC->Q22
		NEG      ACC							; ACC = -ACC

		MOVL     XAR0,@_GEN_SIN_COS_Min
		MOVL     XAR1,@_GEN_SIN_COS_Max
		MOVL     XAR2,@_GEN_SIN_COS_Cos_1
		
		ADDL     ACC,*XAR2						; ACC = Cos_1 - Ws*Ts*Sin_0
		MINL     ACC,*XAR1						; Saturation high
		MAXL     ACC,*XAR0						; Saturation low
		MOVL     *XAR2,ACC						; Cos_1 = Cos_1 - Ws*Ts*Sin_0
		
		MOVL     XT,@_dwSin_Cos_Temp			; XT = Ws*Ts
		IMPYL    P,XT,*XAR3						;P = Ws*Ts*Cos_0[31:0]
		QMPYL    ACC,XT,*XAR3					;ACC = Ws*Ts*Cos_0[63:32]
		LSL64    ACC:P,#12						; ACC->Q22

		MOVL     XAR3,@_GEN_SIN_COS_Sin_1
		
		ADDL     ACC,*XAR3						; ACC = Sin_1 + Ws*Ts*Cos_0
		MINL     ACC,*XAR1						; Saturation hig
		MAXL     ACC,*XAR0						; Saturation low
		MOVL     *XAR3,ACC						; Sin_1 = Sin_1 + Ws*Ts*Cos_0
		
		;;Save the Sin_0, Cos_0 for the next step
		MOVL     XAR0,@_GEN_SIN_COS_Sin_0					 
		MOVL     XAR1,@_GEN_SIN_COS_Cos_0					 

		MOVL     *XAR0,ACC
		MOVL     ACC,*XAR2
		MOVL     *XAR1,ACC

	   .endm

; end of file

Thanks,

Milo

  • Hi, I just noticed you are listed as the author of the www.ti.com/.../sprabr5.pdf applicaiton report. I'm just drawing your attention to my above question about output frequency.
  • If you are getting sine wave with control loop period of 100 cycles (of SYS CLOCK) then you can use our latest F28004x MCU. This runs at 100MHz, faster than F28035.

    Since your sine wave is almost 100 times faster than our example (60Hz), you sampling loop frequency has to higher by the same amount compared to what we have used in order to maintain similar shape/THD of the sine wave.

    Shamim

  • Nikolar,

    There are two aspects to your question,

    1. HW capability

    As shamim mentioned, the switching frequency on this converter is 50kHz and hence the hardware is not capable of generating a very high sine wave.. of 85kHz

    2. SW capability

    For this I would point you to www.ti.com/.../sprac94b.pdf
    where we generate sine wave of different frequencies upto 85kHz , the code is available

    You can refer to boostxl_afe031_f28379d_pwmmode or dacmode example,

    In the PWM mode we generate a 85kHz square pulse and filter in hardware, with DAC we can generate a 85kHz analog output.
  • Based one reading your above post, I think calculation based methods may get very tight for your for the PWM update.

    For example for 85kHz, you want to update at least 50 times, then you will be at 4.25MHz of update

    It's just not possible to update that fast with ISR, hence we have connected the DMA on F28004x and you will be able to update the PWM fast for the sinusoidal generation. 

    we provide some commentary on 3.2.3.1 Software Implementation

    Based on your requirement I will recommend using the F28004x, the example uses an ISR approach, which you can use to start. 

    the example you are referring to originally was never designed to work at such high frequency.   

  • Thanks for all the responses. For now we have a solution. We have some of the faster suggested processors on hand but it didn't look like it would be quick to get them to do what the example for the F2803x is doing mostly because i'm not sure how portable the example we are using is.

    -modified the GEN_SIN_COS.asm to be an inverter so it only needs to be run twice per cycle
    -removed all the voltage measurement loop from the isr.asm
    -using hardware to smooth output waveform