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LAUNCHXL-F28379D: Distortion with 16-bit differential inputs

Part Number: LAUNCHXL-F28379D
Other Parts Discussed in Thread: C2000WARE

Hi,

we have modified the example

C:\TI\c2000\C2000Ware_1_00_03_00\device_support\f2837xd\examples\cpu1\adc_soc_epwm

to use 16-bit resolution and differential input, using ADCINA2/3 as the pair. Functionally this works. The input circuitry was a differential opamp with gain=0.5 to convert from single ended to differential. The input at ADCINA2 is a sine wave with swing between 0 and 3V. The ADCINA3 is the inverted wave form again swing between 0 and 3V.

However we are seeing a high amount of distortion in the ADC 16-bit results and the ENOB is far below the advertised 14.

Next step would be to switch the example to the ADCIND4/5 inputs using the onboard differential opamp circuitry.

Do we have any differential input tests with the LP leading to ENOB 14, that someone could share?

Is there a more optimized setup of the ADC necessary?

Thanks!

--Gunter

  • Hi Gunter,

    We haven't specifically tested the SNR/THD/SFDR/SINAD/ENOB on the launchpad, but I would expect it to get at least reasonably close to the datasheet specified values.

    Are you sourcing a spectrally pure reference sine wave into the differential op-amp, capturing a long record, doing an FFT, and computing the SINAD to get ENOB (or is this a more informal test where you can tell by just looking at the time-domain waveform that it is significantly distorted )?

    What is the signal source that you are using? A regular bench-top function generator usually won't be low enough noise/distortion so you usually need a somewhat specialized instrument to test ADC performance at the 16-bit level. You also need to be very careful about cabling and noise coupling.
  • Hi Devin,

    this is still somewhat of an informal test on the Parker side. My worry is also how quiet the VREFHIA and LOA are as well as any impact of supply rails to the MCU.

    As far as using the ADCIND4/5 for differential input, I have modified the adc_soc_epwm_cpu01.c (attached) to get the onboard differential opamp into use. Functionally this works.

    Observations:

    [] Temporarily switching the ADCD into single ended 16-bit, the ADC results are approx 0x8000, for either ADCIND4 or ADCIND5. This represents the 1.5V at these inputs without a signal connected. So I think this is ok.

    [] Switching the ADCD into differential, using ADCIND4/5 as the input pair, the ADC results are still approx 0x7Fxx type values, but I would have expected this to be the difference of the inputs, i.e. close to zero. Why is this not happening?

    Overall could you take the attached example and duplicate a test where we get close to advertized ENOB?

    Thanks!

    --Gunter

    adc_soc_epwm_cpu01.zip

  • Hi Gunter,

    If you look at the conversion formulas in the TRM (), you are getting the expected results:

    (1.5 - 1.5 + 3.0)/6.0 = 0.5 --> Half the digital range.  

    Note: 'ENOB' is specifically a measure of noise + distortion computed from the SINAD specification as ENOB = (SINAD - 1.76dB)/6.02.  If you are looking at the conversion result accuracy with a DC input you probably want to compare against the Gain, Offset, and INL specifications.  

  • Hi Devin,

    thanks, the TRM helped to explain the differential values in the results buffer.

    The open main issue now is to help find a platform (if it is not the Launchpad), that allows to duplicate the ENOB of 14.1 from the datasheet. The Launchpad does not show that we are close when testing the ADC in 16-bit and differential inputs.

    Which test platform should we use? What additional conditions need to be in place?


    Thanks,
    --Gunter
  • Hi Gunter,

    The test setup for ENOB is roughly as follows:

    • Source a specially pure differential sine wave near 10kHz (slower is OK too) from an instrument with >> 14.1 bits (86.6dB) of phase noise and THD
      • The instrument of choice for this is normally audio precision AP-2722, but Stanford research DS-360 is also appropriate
      • Optional: Use a band-pass or low-pass filter to help remove noise from the input signal.  This is probably not necessary if you are using a differential signal source.
      • Cabling from the instrument to the ADC is extremely important...use a shielded cable like SMA or BNC and keep the cable length short.  Ideally this should be a differential cable, but you can do fine with something like a tightly braided pair of SMA cables.
      • The signal should be buffered locally on the board with a high BW, low noise, low distortion op-amp (or pair of op-amps). 
    • Capture a long record of the sine wave using the ADC into device RAM
      • 64K length record is recommended and should be readily achievable on this device (there is plenty of RAM for this)
      • ADC/System settings:
        • 200MHz SYSCLK sourced from the PLL 
        • PLL input = off-chip XTAL
        • ADCCLK = 50MHz
        • ADC S+H = 320ns or longer (ACQPS = 63)
          • This may need to be slightly longer depending on the R and C values between the driving op-amp and the ADC input pins as well as the BW of the driving op-amp.  The differential amp circuit on the LP should be OK for minimum or near minimum S+H duration.
        • ADC sampling periodically
          • ePWM, CPU timer, or continuous ping-pong sampling are all good options
          • SW triggering will not be sufficiently regular to produce good results
    • Window the ADC results using an FFT windowing function  
    • Compute the SNRD as the ratio of power of the fundamental frequency (near 10kHz, or whatever fin you used) to the rest of the FFT bins.
    • ENOB = (SNRD - 1.76)/6.02

    Can you comment on what the customer's setup looks like compared to this (e.g. what instrument is being used, what does the cabling look like, what circuit is being used for local buffering, etc.)?

    Can you share the FFT results and/or raw capture?