Part Number: LAUNCHXL-F28069M
My code loads and runs from flash fine through the CCS (7.2) debugger. However if I disconnect the USB cable and reconnect, it hangs. If I then press the reset button, it runs again just fine. I have read a dozen or so TI support articles with this exact same problem (not to mention TI's "Running an Application from Internal Flash Memory on the TMS320F28xxx DSP" app note), but none of their fixes work for me. Below are my linker and .asm files which should tell the processor where to start. I have all three dipswitches on my launchpad in the "on" position which I believe is where they should be. In the project properties, Build > C2000 Linker > Advanced Options > Symbol Management, I have the entry point set to "code_start".
Some articles I have read seem to indicate that there's a way to debug this, but I haven't figured out how. When I disconnect USB, the CCS debugger loses contact with the board and won't run again until I reprogram it. If there is a way to debug this please let me know!
Please help!
F2806x_CodeStartBranch.asm:
;// TI File $Revision: /main/2 $ ;// Checkin $Date: January 4, 2011 10:10:05 $ ;//########################################################################### ;// ;// FILE: F2806x_CodeStartBranch.asm ;// ;// TITLE: Branch for redirecting code execution after boot. ;// ;// For these examples, code_start is the first code that is executed after ;// exiting the boot ROM code. ;// ;// The codestart section in the linker cmd file is used to physically place ;// this code at the correct memory location. This section should be placed ;// at the location the BOOT ROM will re-direct the code to. For example, ;// for boot to FLASH this code will be located at 0x3f7ff6. ;// ;// In addition, the example F2806x projects are setup such that the codegen ;// entry point is also set to the code_start label. This is done by linker ;// option -e in the project build options. When the debugger loads the code, ;// it will automatically set the PC to the "entry point" address indicated by ;// the -e linker option. In this case the debugger is simply assigning the PC, ;// it is not the same as a full reset of the device. ;// ;// The compiler may warn that the entry point for the project is other then ;// _c_init00. _c_init00 is the C environment setup and is run before ;// main() is entered. The code_start code will re-direct the execution ;// to _c_init00 and thus there is no worry and this warning can be ignored. ;// ;//########################################################################### ;// $TI Release: F2806x Support Library v2.02.00.00 $ ;// $Release Date: Thu Dec 7 18:50:05 CST 2017 $ ;// $Copyright: ;// Copyright (C) 2009-2017 Texas Instruments Incorporated - http://www.ti.com/ ;// ;// Redistribution and use in source and binary forms, with or without ;// modification, are permitted provided that the following conditions ;// are met: ;// ;// Redistributions of source code must retain the above copyright ;// notice, this list of conditions and the following disclaimer. ;// ;// Redistributions in binary form must reproduce the above copyright ;// notice, this list of conditions and the following disclaimer in the ;// documentation and/or other materials provided with the ;// distribution. ;// ;// Neither the name of Texas Instruments Incorporated nor the names of ;// its contributors may be used to endorse or promote products derived ;// from this software without specific prior written permission. ;// ;// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ;// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT ;// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR ;// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT ;// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, ;// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT ;// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, ;// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY ;// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ;// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE ;// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;// $ ;//########################################################################### *********************************************************************** WD_DISABLE .set 1 ;set to 1 to disable WD, else set to 0 .ref _c_int00 .global code_start *********************************************************************** * Function: codestart section * * Description: Branch to code starting point *********************************************************************** .sect "codestart" code_start: .if WD_DISABLE == 1 LB wd_disable ;Branch to watchdog disable code .else LB _c_int00 ;Branch to start of boot.asm in RTS library .endif ;end codestart section *********************************************************************** * Function: wd_disable * * Description: Disables the watchdog timer *********************************************************************** .if WD_DISABLE == 1 .text wd_disable: SETC OBJMODE ;Set OBJMODE for 28x object code EALLOW ;Enable EALLOW protected register access MOVZ DP, #7029h>>6 ;Set data page for WDCR register MOV @7029h, #0068h ;Set WDDIS bit in WDCR to disable WD EDIS ;Disable EALLOW protected register access LB _c_int00 ;Branch to start of boot.asm in RTS library .endif ;end wd_disable .end ;// ;// End of file. ;//
28609_FLASH_lnk.cmd:
/* //########################################################################### // // FILE: Example_Flash28069_API.cmd // // TITLE: Linker Command File For F28069 Device Flash API // //########################################################################### // $TI Release: F2806x Support Library v2.02.00.00 $ // $Release Date: Thu Dec 7 18:50:05 CST 2017 $ // $Copyright: // Copyright (C) 2009-2017 Texas Instruments Incorporated - http://www.ti.com/ // // Redistribution and use in source and binary forms, with or without // modification, are permitted provided that the following conditions // are met: // // Redistributions of source code must retain the above copyright // notice, this list of conditions and the following disclaimer. // // Redistributions in binary form must reproduce the above copyright // notice, this list of conditions and the following disclaimer in the // documentation and/or other materials provided with the // distribution. // // Neither the name of Texas Instruments Incorporated nor the names of // its contributors may be used to endorse or promote products derived // from this software without specific prior written permission. // // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. // $ //########################################################################### */ /* ====================================================== // For Code Composer Studio V2.2 and later // --------------------------------------- // In addition to this memory linker command file, // add the header linker command file directly to the project. // The header linker command file is required to link the // peripheral structures to the proper locations within // the memory map. // // The header linker files are found in <base>\headers\cmd // // For nonBIOS applications add: F2806x_Headers_nonBIOS.cmd ========================================================= */ /* Define the memory block start/length for the F2806x PAGE 0 will be used to organize program sections PAGE 1 will be used to organize data sections Notes: Memory blocks on F2806x are uniform (ie same physical memory) in both PAGE 0 and PAGE 1. That is the same memory region should not be defined for both PAGE 0 and PAGE 1. Doing so will result in corruption of program and/or data. Contiguous SARAM memory blocks can be combined if required to create a larger memory block. */ MEMORY { PAGE 0: /* Program Memory */ /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */ PRAML0 : origin = 0x008000, length = 0x000800 /* on-chip RAM block L0 */ OTP : origin = 0x3D7800, length = 0x000400 /* on-chip OTP */ FLASHD : origin = 0x3E8000, length = 0x004000 /* on-chip FLASH */ FLASHC : origin = 0x3EC000, length = 0x004000 /* on-chip FLASH */ FLASHA : origin = 0x3F4000, length = 0x003F80 /* on-chip FLASH */ CSM_RSVD : origin = 0x3F7F80, length = 0x000076 /* Part of FLASHA. Program with all 0x0000 when CSM is in use. */ BEGIN : origin = 0x3F7FF6, length = 0x000002 /* Part of FLASHA. Used for "boot to Flash" bootloader mode. */ CSM_PWL_PROG: origin = 0x3F7FF8, length = 0x000008 /* Part of FLASHA. CSM password locations in FLASHA */ FPUTABLES : origin = 0x3FD860, length = 0x0006A0 /* FPU Tables in Boot ROM */ IQTABLES : origin = 0x3FDF00, length = 0x000B50 /* IQ Math Tables in Boot ROM */ IQTABLES2 : origin = 0x3FEA50, length = 0x00008C /* IQ Math Tables in Boot ROM */ IQTABLES3 : origin = 0x3FEADC, length = 0x0000AA /* IQ Math Tables in Boot ROM */ ROM : origin = 0x3FF3B0, length = 0x000C10 /* Boot ROM */ RESET : origin = 0x3FFFC0, length = 0x000002 /* part of boot ROM */ VECTORS : origin = 0x3FFFC2, length = 0x00003E /* part of boot ROM */ PAGE 1 : /* Data Memory */ /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */ /* Registers remain on PAGE1 */ BOOT_RSVD : origin = 0x000000, length = 0x000050 /* Part of M0, BOOT rom will use this for stack */ RAMM0 : origin = 0x000050, length = 0x0003B0 /* on-chip RAM block M0 */ RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */ DRAML1 : origin = 0x008800, length = 0x000400 /* on-chip RAM block L1 */ RAML2 : origin = 0x008C00, length = 0x000400 /* on-chip RAM block L2 */ RAML3 : origin = 0x009000, length = 0x001000 /* on-chip RAM block L3 */ RAML4 : origin = 0x00A000, length = 0x002000 /* on-chip RAM block L4 */ RAML5 : origin = 0x00C000, length = 0x002000 /* on-chip RAM block L5 */ RAML6 : origin = 0x00E000, length = 0x002000 /* on-chip RAM block L6 */ RAML7 : origin = 0x010000, length = 0x002000 /* on-chip RAM block L7 */ RAML8 : origin = 0x012000, length = 0x002000 /* on-chip RAM block L8 */ FLASHB : origin = 0x3F0000, length = 0x004000 /* on-chip FLASH */ } /* Allocate sections to memory blocks. Note: codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code execution when booting to flash ramfuncs user defined section to store functions that will be copied from Flash into RAM */ SECTIONS { /* Allocate program areas: */ /* The Flash API functions can be grouped together as shown below. The defined symbols _Flash28_API_LoadStart, _Flash28_API_LoadEnd and _Flash28_API_RunStart are used to copy the API functions out of flash memory and into SARAM */ /******************************************************************/ /* For Piccolo we dont need to copy the API from Flash as it is */ /* present in BOOT ROM */ /******************************************************************/ /* Flash28_API: // Applicable only when API is not in BootROM { -lFlash2802x_API_V100a.lib(.text) } LOAD = FLASHD, RUN = PRAML0, LOAD_START(_Flash28_API_LoadStart), LOAD_END(_Flash28_API_LoadEnd), RUN_START(_Flash28_API_RunStart), PAGE = 0 */ .cinit : > FLASHA PAGE = 0 .pinit : > FLASHA, PAGE = 0 .text : > FLASHA PAGE = 0 codestart : > BEGIN PAGE = 0 ramfuncs : LOAD = FLASHA, RUN = PRAML0, LOAD_START(_RamfuncsLoadStart), LOAD_END(_RamfuncsLoadEnd), RUN_START(_RamfuncsRunStart), PAGE = 0 csmpasswds : > CSM_PWL_PROG PAGE = 0 csm_rsvd : > CSM_RSVD PAGE = 0 /* Allocate uninitalized data sections: */ .stack : > RAMM0 PAGE = 1 .ebss : > DRAML1 PAGE = 1 .esysmem : > DRAML1 PAGE = 1 /* Initalized sections go in Flash */ /* For SDFlash to program these, they must be allocated to page 0 */ .econst : > FLASHA PAGE = 0 .switch : > FLASHA PAGE = 0 /* Allocate IQ math areas: */ IQmath : > FLASHA PAGE = 0 /* Math Code */ IQmathTables : > IQTABLES, PAGE = 0, TYPE = NOLOAD /* Allocate FPU math areas: */ FPUmathTables : > FPUTABLES, PAGE = 0, TYPE = NOLOAD /* Uncomment the section below if calling the IQNexp() or IQexp() functions from the IQMath.lib library in order to utilize the relevant IQ Math table in Boot ROM (This saves space and Boot ROM is 1 wait-state). If this section is not uncommented, IQmathTables2 will be loaded into other memory (SARAM, Flash, etc.) and will take up space, but 0 wait-state is possible. */ /* IQmathTables2 : > IQTABLES2, PAGE = 0, TYPE = NOLOAD { IQmath.lib<IQNexpTable.obj> (IQmathTablesRam) } */ /* Uncomment the section below if calling the IQNasin() or IQasin() functions from the IQMath.lib library in order to utilize the relevant IQ Math table in Boot ROM (This saves space and Boot ROM is 1 wait-state). If this section is not uncommented, IQmathTables2 will be loaded into other memory (SARAM, Flash, etc.) and will take up space, but 0 wait-state is possible. */ /* IQmathTables3 : > IQTABLES3, PAGE = 0, TYPE = NOLOAD { IQmath.lib<IQNasinTable.obj> (IQmathTablesRam) } */ /* .reset is a standard section used by the compiler. It contains the */ /* the address of the start of _c_int00 for C Code. /* /* When using the boot ROM this section and the CPU vector */ /* table is not needed. Thus the default type is set here to */ /* DSECT */ .reset : > RESET, PAGE = 0, TYPE = DSECT vectors : > VECTORS PAGE = 0, TYPE = DSECT } /* //=========================================================================== // End of file. //=========================================================================== */
