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TMS320F28035: trapezoidal pwm

Part Number: TMS320F28035
Other Parts Discussed in Thread: C2000WARE, CONTROLSUITE

Hello everyone,

I just wanted to start by thanking everyone for helping me in all my other e2e post.  My senior design project is doing great because of you.  So, thanks!  Now to get back to this post.  I am wanting to implement trapezoidal motor control for a BLDC motor.  I am using the F28035 and Hall sensors, but my 6 PWM signals were not setup using three ePWM modules.  Rather, the PWM was set up using ePWM1A-ePWM6A (We did not realize the ePWM were set up in pairs).  I am curious as to how I would go about creating the ramp up and ramp down portions of the trapezoidal phase voltages.  Based upon what i have researched, the phase that is currently having a ramp up/down on the trapezoidal shape is turned off.  For example, if Phase A voltage is at a ramp up/down, then the Phase A high and low FETs would be turned off.  My confusion is how a ramp can be created at these points in time for a particular phase if the phase is off.  Based upon my thinking (which could definitely be wrong),  I would have assumed that a ramp up is created by turning off the low FET for that phase but turn on the high FET using an increasing PWM duty cycle, and a ramp down would be created in the same manner but by decreasing the PWM in the high FET.  Also, if I do have to use a changing PWM signal, how do I sync the PWM signals so that they occur at the appropriate times?   I assumed that since the ePWM compare values load at zero or period (based on register configuration) that the different PWM duty cycles would occur consecutively at the end of each period if I changed the ePWM compare values consecutively in my code (without using any flag checks or delays).  Is this correct to assume?  Sorry for such a long post.  I really appreciate all your help.  Thanks again!

-Brandon

  • Hello, Brandon.
    Could you please draw voltages VS. time for three phases together?
  • Disona,

    Here is a waveform for the phase voltages.  I drew the gate signal voltages (the square waves) with the trapezoidal overlapping.  Each voltage signal has a min voltage of -0.5*Vdc_bus and a max voltage of 0.5*Vdc_bus.  I hope this helps to clear things up.

  • I hope someone more experienced will take a look at this post. I'm too bad in three-hase system.
    But I can tell that you can't apply negative voltage to a phse, if you are referencing negative dc-bus,because your minimal voltage is 0. But if we take your waveforms and move it up with 0.5 dc-bus level, we get voltages in range [0;DC] level. Thats OK, because any motor is driven by its line-to-line voltage - I mean that voltage between negative bus and a phase has no matter. But voltage between two phases (A and B, A and C, B and C) matter. If we move your graph up, we have line-to-line voltages same.

    So now we have a task to create voltages in range [0;DC] at each phase. And that's not hard. If you have duty cycle 75% for example, than you have voltage equal to 75% of your DC. Because "voltage" means "average voltage on a PWM period".

    So I think you can try to set trapezoidal references for your CMPAs. According to your graph, - 0.5 is CMPA=0 and +0.5 is CMPA=TBPRD.

    Could you please try to do this? If you will have phlames and fire at your motor, let's listen to more smart guys.
  • Disona,

    What you suggested is basically what I am implementing to obtain the desired min and max voltages. However, I am wondering if I am needing to step the duty cycle up or down when the voltage is ramping up or down respectively. For example, if I am ramping up the phase A voltage would I set the duty cycle to 10%, then to 20%, then to 40%,...............,then to 100%? In that way the average voltage would be a ramp function with respect to time. I hope that makes sense.

    Regards,
    Brandon
  • If i have understood your question correctly - then yes, you have to change duty cycles according to your ramp.

    Like 00% - 10% -20% - ... - 90% - 100% - 100% - 100% - 90% - 80% ... 10% - 0% - 0% - 0% - 10% ... for phase "A", and same sequence for phases "B" and "C", but shifted for 120 and 240 degrees.

    Do you have some problems with this?

  • You can sync all of the PWM modules to each other by cascading sync signals. In the TBCTL register, look at the SYNCOSEL and PHSDIR fields. Read section 2.2.3.2 and 2.2.3.3 in SPRUGE9E (ePWM Module Reference Guide). When synching, use the phase register to make one PWM delayed from the other as needed. I would also suggest using DMA to change the duty cycles of the PWMs for generating the ramps.
  • None of the C2000 Ware example code are very good for showing syncing in your application, but I think the closest one is
    C:\ti\c2000\C2000Ware_1_00_03_00\device_support\f2803x\examples\c28\epwm_timer_interrupts
  • Quark,

    Thanks for the references.  I will try to implement what you suggested today.  Also, what is DMA that you mentioned?  Thanks again.

    -Brandon

  • You can install C2000 controlSUITE which can be downloaded from TI website, and will find some BLDC example projects like "HVBLDC_Sensorless" in controlSUITE as below. You can also find a "Sensorless Trapezoidal Control of BLDC Motors" application notes in this folder, there is a detail description on how to change the pwm duty and control the BLDC as you required voltage trapezoidal waveform. Please let me know if you have any questions on this example project, or you can also find the answer to a similar question from E2E forums.

    \ti\controlSUITE\development_kits\HVMotorCtrl+PfcKit_v2.1\HVBLDC_Sensorless
  • See the below for C2000 ware

    http://e2e.ti.com/support/microcontrollers/c2000/f/171/t/619425

    DMA is direct memory access.  It can be used to update PWM registers without CPU intervention.  This is important if your PWM frequencies are fast and you want the CPU to also be doing something else.  But it has a learning curve to set up, so if your PWM frequency is slow, just use the CPU and interrupts.

  • Quark,
    Could you please point me to some references for DMA. I would like to learn more about it. For the meantime I will try to implement with CPU and interrupts.

    Thanks,
    Brandon
  • I just realized that the 2803x does not have DMA. Sorry.

    I normally work with 2806x and 28335, so I just assumed that the chip you're using has DMA. If you're still interested in DMA, a good example code is in C2000 Ware under
    C:\ti\c2000\C2000Ware_1_00_03_00\device_support\f2806x\examples\c28\dma_ram_to_ram
  • If I use an increasing/decreasing pwm duty cycles to get a trapezoidal voltage waveform, do I need to use the high FET for a particular phase when the trapezoid is on top of the waveform and then use the low FET on a particular phase when the trapezoid is on bottom? For example, when phase A is at its max and decreasing I would use 100%.....90%.....reaching 0% when the voltage is at approximately the midpoint between peak-to-peak, then I would began to increase the duty cycle on the phase A low FET after the voltage passes the midpoint until I reach the min phase A voltage. Is this correct?
  • I'm a by no means experienced with BLDC, but this video may help you

    https://www.youtube.com/watch?v=szgVUfyX8JM