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TMS320F28033: clock missing

Howard Zou
Genius 12365 points

Part Number: TMS320F28033

Hi, my customer is using F28033 to build a DC/DC converter and in some situation the circuit will stop working, it's found that F28033 stopped working then.

We checked XRS, XCLKOUT, and VDDIO, and the waveform is as below.

XRS-blue, XCLKOUT-yellow, VDDIO-red.

It can be seen that XCLKOUT will have clock output for a short pulse and then high for about 3.5ms, repetitively.

After zoom in, the waveform is as below, the XCLKOUT output is always 60MHz=SYSCLK:

They are using an external crystal. And from the wavefrom we can know that F28033 does not reset during the period since XCLKOUT=SYSCLK, if reset, XCLKOUT=SYSCLK/4.

So they wonder 

1. Can we determine that it's the input clock of the external crystal missing that caused XCLKOUT constant high? Is it possible that external crystal is still working but XCLKOUT output constant high(no clock pulse)?

2. Why F28033 does not reset when the clock is missing? How do we need to configure the registers that will let the MCU reset during missing clock input?

  • 0
    TI__Guru* 95315 points

    Howard,

                How did you determine that the "F28033 stopped working "? And exactly what does "stopped working" mean?

     

    In the first scope plot, you mention "It can be seen that XCLKOUT will have clock output for a short pulse and then high for about 3.5ms, repetitively". However, in the 2nd scope plot, you mention "the XCLKOUT output is always 60MHz=SYSCLK". Which is correct? Are you saying XCLKOUT = 60 MHz in the time it appears?

     

    How is the MCD configured? Is it configured to assert a reset right away if the clock goes missing?

     

    Can we determine that it's the input clock of the external crystal missing that caused XCLKOUT constant high?

    Answer--> First, please clarify if the XCLKOUT is a constant high or a constant 60 MHz. You mention both in your post.

     

    Is it possible that external crystal is still working but XCLKOUT output constant high(no clock pulse)?

    Answer--> If external crystal is working without any stopping, then a missing-clock event has not occurred. In this situation, there is no reason why XCLKOUT can suddenly vanish, unless the XCLK register got corrupted. From the Reference guide: If XCLKOUT is not being used, it can be turned off by setting the XCLKOUTDIV bit to 3 in the XCLK register.

     

    Why F28033 does not reset when the clock is missing? How do we need to configure the registers that will let the MCU reset during missing clock input?

    Answer--> It depends on how the code handles a missing clock condition. Please refer to the documentation on how to configure the MCU to reset in case of a missing clock.

     

    On a different note, please refer to SPRUH18 or SPRUHE5 for description of the Missing Clock Detect (MCD) circuit. That section has been re-written in those docs. Those changes will be pulled into 2802x/2803x Reference guides soon. The behavior of the MCD is pretty similar across these devices.

  • 0 in reply to Hareesh Janakiraman
    TI__Genius 12365 points
    Hareesh,
    In first plot, the XCLKOUT will have a short period of clock pulse and then high for about 3.5ms. 2nd plot is the zoom in of the short period in the first plot that the clock output is generating, and the frequency at this period is 60MHz.
    "stopped working" means: They will have a ISR to update the control logic of DC/DC converter, at the beginning of the ISR, a GPIO will output 1, at the end of the ISR, the GPIO will be 0, and an LED is connected to this GPIO. When the converter is working properly, the LED will blink, but they observed the LED stopped blinking after working a period of time. So they do the test I described above to check the clock signal.
  • 0 in reply to Howard Zou
    TI__Guru* 95315 points
    Is this problem seen if the on-chip zero-pin oscillator (INTOSC1) is used as the clock source?

    Are you sure the -XRS pin is not pulsing? Sometimes, it is easy to miss an event if the scope is triggered off a channel that is measuring a completely different frequency. Could you please probe only the -XRS pin and disconnect all other channels?

    Is the Watchdog used in the application?

    Is the problem seen with the emulator? If so, is it possible to stop the execution to see where the program-counter is?

    Is this seen in more than one device?

    What provokes this behavior? Is this issue repeatable?
  • 0 in reply to Hareesh Janakiraman
    TI__Genius 12365 points
    They are using external crystal when they find the problem. Yesterday they also tried oscillator but the problem still exists even the oscillator is generating clock correctly.
    I'm sure XRS is not pulsing. It makes sense since the clock missing detection reset will not pull XRS low according to TRM.
    The problem is seen without emulator and is repeatable in some board.

    I found below sentences in the TRM:
    Software should check the PLLSTS[MCLKSTS] bit after a reset to determine if the device was reset by
    MCLKRS due to a missing clock condition. If MCLKSTS is set, then the firmware should take the action
    appropriate for the system such as a system shutdown. The missing clock status can be cleared by writing
    a 1 to the PLLSTS[MCLKCLR] bit. This will reset the missing clock detection circuits and counters.

    Does it mean that I have to write a 1 to PLLSTS[MCLKCLR] bit after the reset happen once, otherwise the missing clock detection will keep resetting the device?
  • 0 in reply to Howard Zou
    TI__Guru* 95315 points
    Which TRM are you referring to? Provide the literature number.
  • 0 in reply to Hareesh Janakiraman
    TI__Genius 12365 points
    SPRUH18 page 91. The MCLKRS is an internal reset only. The external XRS pin of the device is not pulled low by MCLKRS .
    page 92:
    Software should check the PLLSTS[MCLKSTS] bit after a reset to determine if the device was reset by
    MCLKRS due to a missing clock condition. If MCLKSTS is set, then the firmware should take the action
    appropriate for the system such as a system shutdown. The missing clock status can be cleared by writing
    a 1 to the PLLSTS[MCLKCLR] bit. This will reset the missing clock detection circuits and counters.
  • 0 in reply to Howard Zou
    TI__Guru* 95315 points

    Does it mean that I have to write a 1 to PLLSTS[MCLKCLR] bit after the reset happen once, otherwise the missing clock detection will keep resetting the device?

     

    The TRM clearly says this: "If OSCCLK is still missing after writing to the MCLKCLR bit, then the VCOCLK counter again overflows and the process will repeat".

     

    But it is still not clear if we are dealing with a missing-clock condition. And you are yet to provide answers to these questions:

     

    Is the Watchdog used in the application?

    Is the problem seen with the emulator? If so, is it possible to stop the execution to see where the program-counter is?

    Is this seen in more than one device?

    What provokes this behavior? Is this issue repeatable?

  • 0 in reply to Hareesh Janakiraman
    TI__Mastermind 27240 points
    Hi Howard,
    Is the issue resolved?