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TMS320F28035: TMS28035 Two way CAN communication

Part Number: TMS320F28035
Other Parts Discussed in Thread: CONTROLSUITE

Hello,

I'm trying to configure two TMS320f28035 for eCAN communication.(MCU0 for CANTX and MCU1 for CANRX)

I used the datasheet of the DSP and loopback example in controlsuit to configure the communication, step by step as written at the end of the document.

with the watch window, when i transmitts single byte data from MCU0 then i am receiving correct data on MCU1. But when i only power off the MCU0 then MDL and MDH register in MCU1 showing old data that  was i received in previous receiption . That's why i am continuously seeing data in  MCU1 MDL and MDH register  even when  the MCU0  is not sending. that's why i want to clear both MDL and MDH register on MCU1 before the next receiving byte.so how can i do it ? that means when i power off the only MCU0 then i don't want to receive previous data.

Here is my code.

Ref:C:\ti\controlSUITE\device_support\f2803x\v130\DSP2803x_examples_ccsv5\ecan_back2back

MCU0 Transmitter side code:

void main(void)
{
    Uint16  j;

   struct ECAN_REGS ECanaShadow;

   InitSysCtrl();

   InitECanGpio();

   DINT;

   InitPieCtrl();

   IER = 0x0000;
   IFR = 0x0000;

   InitPieVectTable();

    MessageReceivedCount = 0;
    ErrorCount = 0;
    PassCount = 0;

    InitECana();                                  // Initialize eCAN-A module

    // Mailboxes can be written to 16-bits or 32-bits at a time
    // Write to the MSGID field of TRANSMIT mailboxe MBOX0

    ECanaMboxes.MBOX0.MSGID.all = 0x9555AAA0;

    // Configure Mailboxes 0 as Tx, 16 as Rx
    // Since this write is to the entire register (instead of a bit
    // field) a shadow register is not required.
    ECanaRegs.CANMD.all = 0xFFFF0000;

    // Enable all Mailboxes */
    // Since this write is to the entire register (instead of a bit
    // field) a shadow register is not required.
    ECanaRegs.CANME.all = 0xFFFFFFFF;

    // Specify that 8 bits will be sent/received
    ECanaMboxes.MBOX0.MSGCTRL.bit.DLC = 8;
 

    // Write to the mailbox RAM field of MBOX0 - 15
    ECanaMboxes.MBOX0.MDL.all = 0x9555AAA0;
    ECanaMboxes.MBOX0.MDH.all = 0x89ABCDEF;

    // Since this write is to the entire register (instead of a bit
    // field) a shadow register is not required.
    EALLOW;
    ECanaRegs.CANMIM.all = 0xFFFFFFFF;

    // Configure the eCAN for self test mode
    // Enable the enhanced features of the eCAN.
    EALLOW;
    ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
    ECanaShadow.CANMC.bit.STM = 1;    // Configure CAN for self-test mode
    ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;
    EDIS;

    // Begin transmitting
    for(;;)
    {
       ECanaRegs.CANTRS.all = 0x0000FFFF;  // Set TRS for all transmit mailboxes
       while(ECanaRegs.CANTA.all != 0x0000FFFF ) {}  // Wait for all TAn bits to be set..
       ECanaRegs.CANTA.all = 0x0000FFFF;   // Clear all TAn
       MessageReceivedCount++;

       Delay_us(900000)  

  }
}

/*********************************************************/

/*********************************************************/

MCU1 Receiver side code:

void main(void)
{
    Uint16  j;

   struct ECAN_REGS ECanaShadow;

   InitSysCtrl();

   InitECanGpio();

   DINT;

   InitPieCtrl();

   IER = 0x0000;
   IFR = 0x0000;

   InitPieVectTable();

    MessageReceivedCount = 0;
    ErrorCount = 0;
    PassCount = 0;

    InitECana();                                  // Initialize eCAN-A module

  
    // Write to the MSGID field of RECEIVE mailboxe MBOX16


    ECanaMboxes.MBOX16.MSGID.all = 0x9555AAA0;
  

    // Configure Mailboxes 0 as Tx, 16 as Rx
    // Since this write is to the entire register (instead of a bit
    // field) a shadow register is not required.
    ECanaRegs.CANMD.all = 0xFFFF0000;

    // Enable all Mailboxes */
    // Since this write is to the entire register (instead of a bit
    // field) a shadow register is not required.
    ECanaRegs.CANME.all = 0xFFFFFFFF;

    // Specify that 8 bits will be sent/received
    ECanaMboxes.MBOX0.MSGCTRL.bit.DLC = 8;
 
    // Since this write is to the entire register (instead of a bit
    // field) a shadow register is not required.
    EALLOW;
    ECanaRegs.CANMIM.all = 0xFFFFFFFF;

    // Configure the eCAN for self test mode
    // Enable the enhanced features of the eCAN.
    EALLOW;
    ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
    ECanaShadow.CANMC.bit.STM = 1;    // Configure CAN for self-test mode
    ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;
    EDIS;

    // Begin receiving
    for(;;)
    {
       //Read from Receive mailboxes and begin checking for data */
       for(j=16; j<17; j++)         // Read & check 16 mailboxes
       {
          mailbox_read(j);         // This func reads the indicated mailbox data
          mailbox_check(TestMbox1,TestMbox2,TestMbox3); // Checks the received data
       }

       Delay_us(900000)  ;

  }
}
// This function reads out the contents of the indicated
// by the Mailbox number (MBXnbr).
void mailbox_read(int16 MBXnbr)
{
   volatile struct MBOX *Mailbox;
   Mailbox = &ECanaMboxes.MBOX0 + MBXnbr;
   TestMbox1 = Mailbox->MDL.all; // = 0x9555AAAn (n is the MBX number)
   TestMbox2 = Mailbox->MDH.all; // = 0x89ABCDEF (a constant)
   TestMbox3 = Mailbox->MSGID.all;// = 0x9555AAAn (n is the MBX number)
} // MSGID of a rcv MBX is transmitted as the MDL data.

void mailbox_check(int32 T1, int32 T2, int32 T3)
{
    if((T1 != T3) || ( T2 != 0x89ABCDEF))
    {
       ErrorCount++;
    }
    else
    {
       PassCount++;
    }
}

Thanks.

  • Abdul,
    The CAN mailbox is like RAM. Meaning, whatever data is stored there will remain there until new data overwrites it. The data does not "vanish" when you read it. If you don’t want the "old" data to continue staying in RAM, then the application needs to overwrite it with some known value (say, all zeroes).
  • OK thank you for your reply.
    But the problem was i am facing is when i power off the transmitter side micro-controller then receiver side micro-controller checking CAN receive function that why i am continuously receiving data on receiver side even when the transmitter is not sending. in that case how i can receive dummy data or all zeros. The above code is all correct or some changes is required please correct me if any wrong in code.

    that why i have cleared MDL and MDH register in receiver side but no success.
    void mailbox_read(int16 MBXnbr)
    {
    volatile struct MBOX *Mailbox;
    Mailbox = &ECanaMboxes.MBOX0 + MBXnbr;
    TestMbox1 = Mailbox->MDL.all; // = 0x9555AAAn (n is the MBX number)
    TestMbox2 = Mailbox->MDH.all; // = 0x89ABCDEF (a constant)
    TestMbox3 = Mailbox->MSGID.all;// = 0x9555AAAn (n is the MBX number)

    /***************************************/
    Mailbox->MDL.all=0;
    Mailbox->MDH.all=0;
    /***************************************/
    } // MSGID of a rcv MBX is transmitted as the MDL data.

    Thanks
  • Abdul,

                I realized I misspoke in my previous post. CPU does not have write-access for a Receive-mailbox RAM. Only the CAN module (upon receiving a data frame) can write to the receive-MBX-RAM.

     

    No, you are not "continuously receiving data on receiver side even when the transmitter is not sending". As explained before, what is received once stays in the mailbox-RAM until new data overwrites it. That is what you are seeing.

  • Please try this experiment. Momentarily re-configure the MBX direction for transmission and see if these two instructions zero-out the MBX RAM.
  • Abdul,
    I haven't heard from you in a while, so I presume you were able to figure out the issue. Let me know if this is not the case. I'll go ahead and close the post.
  • Sorry for the delaying in reply.. actually I am busy in another project.
    what does mean the reconfigure. that means I have to change tx mailbox direction to rx mailbox and vice-versa.
  • No. You mentioned you wanted the data in the Rcv to be "cleared" after reading it. You could do this by configuring it as a TX mailbox and clearing out the RAM. But you run the risk of losing a message in the interim. I am bit confused as to why you want the RCV MBX RAM to be cleared. You go read RCV MBX RAM either (a) when you get a mailbox interrupt or (b) when you poll the RMP bit and see it flip to 1. In both cases, action is initiated only when new data is received, so there is no way you can read "old" data. I strongly urge you to take a look at the examples in my app.note SPRS876.

  • Yes you are right it will be better if i poll the RMP bit. Let me try it then i will tell my result
    thank you very much .Please give me the link or pdf of your app.note SPRS876.actually i searched on internet but didn't find yet.
  • Sameer,

    It is SPRA876. I am extremely sorry for mis-typing the lit #. The link is http://www.ti.com/lit/an/spra876b/spra876b.pdf

  • Ok I will check this document.