Other Parts Discussed in Thread: UNIFLASH,
I created a batch script for the TMS320F28377D dual core microcontroller using the Standalone Command Line generator in Uniflash v4.2.1.1562. The programming of CPU1 using the resulting dslite.bat file is successful. The programming of CPU2 fails when calling the same batch script file with passing the --core parameter. I have included the output of the batch file below. Is there a way to utilize the generated batch script from the Uniflash Command Line option to program CPU2?
C:\Mfg\uniflash_windows_32>dslite.bat -c user_files/configs/tms320f28377d.ccxml --core 2 --verbose --flash --verify user_files/images/Cpu2_jtag_1_0_183.bin,0x00080000
Executing the following command:
> "C:\Mfg\uniflash_windows_32\ccs_base\DebugServer\bin\DSLite" flash -c user_files/configs/tms320f28377d.ccxml --core 2 --verbose --flash --verify user_files/images/Cpu2_jtag_1_0_183.bin,0x00080000
DSLite version 7.4.0.1095
Configuring Debugger (may take a few minutes on first launch)...
Parsing connections/TIXDS2XXUSB_Connection.xml
Parsing drivers/tixds560icepick_c.xml
Parsing drivers/tixds560c28x.xml
Parsing drivers/tixds560cla1.xml
Parsing drivers/tixds560cs_child.xml
Parsing devices/tms320f28377d.xml
Parsing routers/icepick_c.xml
Parsing ..\Modules\ICEPickCHidden.xml
Parsing cpus/c28xx.xml
Parsing ..\Modules\C28xNotVisible.xml
Parsing ../Modules/C2000/C2000_FPU32_Registers.xml
Parsing ../Modules/C2000/C2000_VCU_Type2_Registers.xml
Parsing ../Modules/C2000/F28x7x_access_protection_regs.xml
Parsing ../Modules/C2000/f2837xd_adc_result_regs.xml
Parsing ../Modules/C2000/f2837xd_adc_regs.xml
Parsing ../Modules/C2000/F28x7x_analog_subsys_regs.xml
Parsing ../Modules/C2000/F28x7x_can_regs.xml
Parsing ../Modules/C2000/F28x7x_cla_regs.xml
Parsing ../Modules/C2000/f2837xd_clk_cfg_regs.xml
Parsing ../Modules/C2000/F28x7x_cmpss_regs.xml
Parsing ../Modules/C2000/f2837xd_cpu_sys_regs.xml
Parsing ../Modules/C2000/F28x7x_cputimer_regs.xml
Parsing ../Modules/C2000/F28x7x_dac_regs.xml
Parsing ../Modules/C2000/F28x7x_dcsm_common_regs.xml
Parsing ../Modules/C2000/F28x7x_dcsm_z1_regs.xml
Parsing ../Modules/C2000/F28x7x_dcsm_z2_regs.xml
Parsing ../Modules/C2000/f2837xd_dev_cfg_regs.xml
Parsing ../Modules/C2000/f2837xd_dma_cla_src_sel_regs.xml
Parsing ../Modules/C2000/F28x7x_dma_regs.xml
Parsing ../Modules/C2000/F28x7x_dma_ch_regs.xml
Parsing ../Modules/C2000/F28x7x_ecap_regs.xml
Parsing ../Modules/C2000/F28x7x_emif1_config_regs.xml
Parsing ../Modules/C2000/F28x7x_emif2_config_regs.xml
Parsing ../Modules/C2000/F28x7x_emif_regs.xml
Parsing ../Modules/C2000/F28x7x_epwm_regs.xml
Parsing ../Modules/C2000/F28x7x_epwm_xbar_regs.xml
Parsing ../Modules/C2000/F28x7x_eqep_regs.xml
Parsing ../Modules/C2000/f2837xd_flash_ctrl_regs.xml
Parsing ../Modules/C2000/f2837xd_flash_ecc_regs.xml
Parsing ../Modules/C2000/f2837xd_flash_pump_semaphore_regs.xml
Parsing ../Modules/C2000/f2837xd_gpio_ctrl_regs.xml
Parsing ../Modules/C2000/f2837xd_gpio_data_regs.xml
Parsing ../Modules/C2000/F28x7x_i2c_regs.xml
Parsing ../Modules/C2000/F28x7x_ipc_regs_cpu1.xml
Parsing ../Modules/C2000/F28x7x_mcbsp_regs.xml
Parsing ../Modules/C2000/F28x7x_mem_cfg_regs.xml
Parsing ../Modules/C2000/F28x7x_memory_error_regs.xml
Parsing ../Modules/C2000/F28x7x_nmi_intrupt_regs.xml
Parsing ../Modules/C2000/F28x7x_output_xbar_regs.xml
Parsing ../Modules/C2000/F28x7x_pie_ctrl_regs.xml
Parsing ../Modules/C2000/F28x7x_rom_prefetch_regs.xml
Parsing ../Modules/C2000/F28x7x_rom_wait_state_regs.xml
Parsing ../Modules/C2000/F28x7x_sci_regs.xml
Parsing ../Modules/C2000/F28x7x_sdfm_regs.xml
Parsing ../Modules/C2000/F28x7x_spi_regs.xml
Parsing ../Modules/C2000/f2837xd_sync_soc_regs.xml
Parsing ../Modules/C2000/F28x7x_upp_regs.xml
Parsing ../Modules/C2000/C2000_USB_Type0_Registers.xml
Parsing ../Modules/C2000/f2837xd_wd_regs.xml
Parsing ../Modules/C2000/F28x7x_input_xbar_regs.xml
Parsing ../Modules/C2000/F28x7x_xint_regs.xml
Parsing ../Modules/C2000/F28x7x_xbar_regs.xml
Parsing ../cpus/cla1.xml
Parsing ..\Modules\ihwa\cla_notvisible.xml
Parsing ../Modules/C2000/C2000_CLA_Type0_Registers.xml
Parsing ../Modules/CLA0NotVisible.xml
Parsing cpus/cs_child.xml
Parsing cpus/c28xx.xml
Parsing ..\Modules\C28xNotVisible.xml
Parsing ../Modules/C2000/C2000_FPU32_Registers.xml
Parsing ../Modules/C2000/C2000_VCU_Type2_Registers.xml
Parsing ../Modules/C2000/F28x7x_access_protection_regs.xml
Parsing ../Modules/C2000/f2837xd_adc_result_regs.xml
Parsing ../Modules/C2000/f2837xd_adc_regs.xml
Parsing ../Modules/C2000/F28x7x_can_regs.xml
Parsing ../Modules/C2000/F28x7x_cla_regs.xml
Parsing ../Modules/C2000/f2837xd_clk_cfg_regs.xml
Parsing ../Modules/C2000/F28x7x_cmpss_regs.xml
Parsing ../Modules/C2000/f2837xd_cpu_sys_regs.xml
Parsing ../Modules/C2000/F28x7x_cputimer_regs.xml
Parsing ../Modules/C2000/F28x7x_dac_regs.xml
Parsing ../Modules/C2000/F28x7x_dcsm_common_regs.xml
Parsing ../Modules/C2000/F28x7x_dcsm_z1_regs.xml
Parsing ../Modules/C2000/F28x7x_dcsm_z2_regs.xml
Parsing ../Modules/C2000/f2837xd_dma_cla_src_sel_regs.xml
Parsing ../Modules/C2000/F28x7x_dma_regs.xml
Parsing ../Modules/C2000/F28x7x_dma_ch_regs.xml
Parsing ../Modules/C2000/F28x7x_ecap_regs.xml
Parsing ../Modules/C2000/F28x7x_emif1_config_regs.xml
Parsing ../Modules/C2000/F28x7x_emif_regs.xml
Parsing ../Modules/C2000/F28x7x_epwm_regs.xml
Parsing ../Modules/C2000/F28x7x_eqep_regs.xml
Parsing ../Modules/C2000/f2837xd_flash_ctrl_regs.xml
Parsing ../Modules/C2000/f2837xd_flash_ecc_regs.xml
Parsing ../Modules/C2000/f2837xd_flash_pump_semaphore_regs.xml
Parsing ../Modules/C2000/f2837xd_gpio_data_regs.xml
Parsing ../Modules/C2000/F28x7x_i2c_regs.xml
Parsing ../Modules/C2000/F28x7x_ipc_regs_cpu2.xml
Parsing ../Modules/C2000/F28x7x_mcbsp_regs.xml
Parsing ../Modules/C2000/F28x7x_mem_cfg_regs.xml
Parsing ../Modules/C2000/F28x7x_memory_error_regs.xml
Parsing ../Modules/C2000/F28x7x_nmi_intrupt_regs.xml
Parsing ../Modules/C2000/F28x7x_pie_ctrl_regs.xml
Parsing ../Modules/C2000/F28x7x_sci_regs.xml
Parsing ../Modules/C2000/F28x7x_sdfm_regs.xml
Parsing ../Modules/C2000/F28x7x_spi_regs.xml
Parsing ../Modules/C2000/f2837xd_wd_regs.xml
Parsing ../Modules/C2000/F28x7x_xint_regs.xml
Parsing ../cpus/cla1.xml
Parsing ..\Modules\ihwa\cla_notvisible.xml
Parsing ../Modules/C2000/C2000_CLA_Type0_Registers.xml
Parsing ../Modules/CLA0NotVisible.xml
Parsing cpus/cs_child.xml
Initializing Register Database...
Parsing C:\Users\schreija\AppData\Local\TEXASI~1\CCS\Mfg\0\0\2291853161.cache
Initializing: IcePick_C_0
Mapping registers: IcePick_C_0 - Core Registers
Mapping registers: IcePick_C_0 - Hidden
Building search data: IcePick_C_0
Executing Startup Scripts: IcePick_C_0
Initializing: C28xx_CPU1
Mapping registers: C28xx_CPU1 - Core Registers
Mapping registers: C28xx_CPU1 - FPU
Mapping registers: C28xx_CPU1 - VCU
Mapping registers: C28xx_CPU1 - AccessProtectionRegs
Mapping registers: C28xx_CPU1 - AdcaResultRegs
Mapping registers: C28xx_CPU1 - AdcbResultRegs
Mapping registers: C28xx_CPU1 - AdccResultRegs
Mapping registers: C28xx_CPU1 - AdcdResultRegs
Mapping registers: C28xx_CPU1 - AdcaRegs
Mapping registers: C28xx_CPU1 - AdcbRegs
Mapping registers: C28xx_CPU1 - AdccRegs
Mapping registers: C28xx_CPU1 - AdcdRegs
Mapping registers: C28xx_CPU1 - AnalogSubsysRegs
Mapping registers: C28xx_CPU1 - CanaRegs
Mapping registers: C28xx_CPU1 - CanbRegs
Mapping registers: C28xx_CPU1 - Cla1Regs
Mapping registers: C28xx_CPU1 - ClkCfgRegs
Mapping registers: C28xx_CPU1 - Cmpss1Regs
Mapping registers: C28xx_CPU1 - Cmpss2Regs
Mapping registers: C28xx_CPU1 - Cmpss3Regs
Mapping registers: C28xx_CPU1 - Cmpss4Regs
Mapping registers: C28xx_CPU1 - Cmpss5Regs
Mapping registers: C28xx_CPU1 - Cmpss6Regs
Mapping registers: C28xx_CPU1 - Cmpss7Regs
Mapping registers: C28xx_CPU1 - Cmpss8Regs
Mapping registers: C28xx_CPU1 - CpuSysRegs
Mapping registers: C28xx_CPU1 - CpuTimer0Regs
Mapping registers: C28xx_CPU1 - CpuTimer1Regs
Mapping registers: C28xx_CPU1 - CpuTimer2Regs
Mapping registers: C28xx_CPU1 - DacaRegs
Mapping registers: C28xx_CPU1 - DacbRegs
Mapping registers: C28xx_CPU1 - DaccRegs
Mapping registers: C28xx_CPU1 - DcsmCommonRegs
Mapping registers: C28xx_CPU1 - DcsmZ1Regs
Mapping registers: C28xx_CPU1 - DcsmZ2Regs
Mapping registers: C28xx_CPU1 - DevCfgRegs
Mapping registers: C28xx_CPU1 - DmaClaSrcSelRegs
Mapping registers: C28xx_CPU1 - DmaRegs
Mapping registers: C28xx_CPU1 - DmaCh1Regs
Mapping registers: C28xx_CPU1 - DmaCh2Regs
Mapping registers: C28xx_CPU1 - DmaCh3Regs
Mapping registers: C28xx_CPU1 - DmaCh4Regs
Mapping registers: C28xx_CPU1 - DmaCh5Regs
Mapping registers: C28xx_CPU1 - DmaCh6Regs
Mapping registers: C28xx_CPU1 - ECap1Regs
Mapping registers: C28xx_CPU1 - ECap2Regs
Mapping registers: C28xx_CPU1 - ECap3Regs
Mapping registers: C28xx_CPU1 - ECap4Regs
Mapping registers: C28xx_CPU1 - ECap5Regs
Mapping registers: C28xx_CPU1 - ECap6Regs
Mapping registers: C28xx_CPU1 - Emif1ConfigRegs
Mapping registers: C28xx_CPU1 - Emif2ConfigRegs
Mapping registers: C28xx_CPU1 - Emif1Regs
Mapping registers: C28xx_CPU1 - Emif2Regs
Mapping registers: C28xx_CPU1 - EPwm1Regs
Mapping registers: C28xx_CPU1 - EPwm2Regs
Mapping registers: C28xx_CPU1 - EPwm3Regs
Mapping registers: C28xx_CPU1 - EPwm4Regs
Mapping registers: C28xx_CPU1 - EPwm5Regs
Mapping registers: C28xx_CPU1 - EPwm6Regs
Mapping registers: C28xx_CPU1 - EPwm7Regs
Mapping registers: C28xx_CPU1 - EPwm8Regs
Mapping registers: C28xx_CPU1 - EPwm9Regs
Mapping registers: C28xx_CPU1 - EPwm10Regs
Mapping registers: C28xx_CPU1 - EPwm11Regs
Mapping registers: C28xx_CPU1 - EPwm12Regs
Mapping registers: C28xx_CPU1 - EPwmXbarRegs
Mapping registers: C28xx_CPU1 - EQep1Regs
Mapping registers: C28xx_CPU1 - EQep2Regs
Mapping registers: C28xx_CPU1 - EQep3Regs
Mapping registers: C28xx_CPU1 - FlashCtrlRegs
Mapping registers: C28xx_CPU1 - FlashEccRegs
Mapping registers: C28xx_CPU1 - FlashPumpSemaphoreRegs
Mapping registers: C28xx_CPU1 - GpioCtrlRegs
Mapping registers: C28xx_CPU1 - GpioDataRegs
Mapping registers: C28xx_CPU1 - I2caRegs
Mapping registers: C28xx_CPU1 - I2cbRegs
Mapping registers: C28xx_CPU1 - IpcRegs
Mapping registers: C28xx_CPU1 - McbspaRegs
Mapping registers: C28xx_CPU1 - McbspbRegs
Mapping registers: C28xx_CPU1 - MemCfgRegs
Mapping registers: C28xx_CPU1 - MemoryErrorRegs
Mapping registers: C28xx_CPU1 - NmiIntruptRegs
Mapping registers: C28xx_CPU1 - OutputXbarRegs
Mapping registers: C28xx_CPU1 - PieCtrlRegs
Mapping registers: C28xx_CPU1 - RomPrefetchRegs
Mapping registers: C28xx_CPU1 - RomWaitStateRegs
Mapping registers: C28xx_CPU1 - SciaRegs
Mapping registers: C28xx_CPU1 - ScibRegs
Mapping registers: C28xx_CPU1 - ScicRegs
Mapping registers: C28xx_CPU1 - ScidRegs
Mapping registers: C28xx_CPU1 - Sdfm1Regs
Mapping registers: C28xx_CPU1 - Sdfm2Regs
Mapping registers: C28xx_CPU1 - SpiaRegs
Mapping registers: C28xx_CPU1 - SpibRegs
Mapping registers: C28xx_CPU1 - SpicRegs
Mapping registers: C28xx_CPU1 - SyncSocRegs
Mapping registers: C28xx_CPU1 - UppRegs
Mapping registers: C28xx_CPU1 - UsbaRegs
Mapping registers: C28xx_CPU1 - WdRegs
Mapping registers: C28xx_CPU1 - InputXbarRegs
Mapping registers: C28xx_CPU1 - XintRegs
Mapping registers: C28xx_CPU1 - XbarRegs
Mapping registers: C28xx_CPU1 - Hidden
Building search data: C28xx_CPU1
Applying virtual groups: C28xx_CPU1 - VCU
Executing Startup Scripts: C28xx_CPU1
Initializing: CPU1_CLA1
Mapping registers: CPU1_CLA1 - Core Registers
Mapping registers: CPU1_CLA1 - CPU1_CLA1
Mapping registers: CPU1_CLA1 - Hidden
Building search data: CPU1_CLA1
Executing Startup Scripts: CPU1_CLA1
Initializing: C28xx_CPU2
Mapping registers: C28xx_CPU2 - Core Registers
Mapping registers: C28xx_CPU2 - FPU
Mapping registers: C28xx_CPU2 - VCU
Mapping registers: C28xx_CPU2 - AccessProtectionRegs
Mapping registers: C28xx_CPU2 - AdcaResultRegs
Mapping registers: C28xx_CPU2 - AdcbResultRegs
Mapping registers: C28xx_CPU2 - AdccResultRegs
Mapping registers: C28xx_CPU2 - AdcdResultRegs
Mapping registers: C28xx_CPU2 - AdcaRegs
Mapping registers: C28xx_CPU2 - AdcbRegs
Mapping registers: C28xx_CPU2 - AdccRegs
Mapping registers: C28xx_CPU2 - AdcdRegs
Mapping registers: C28xx_CPU2 - CanaRegs
Mapping registers: C28xx_CPU2 - CanbRegs
Mapping registers: C28xx_CPU2 - Cla1Regs
Mapping registers: C28xx_CPU2 - ClkCfgRegs
Mapping registers: C28xx_CPU2 - Cmpss1Regs
Mapping registers: C28xx_CPU2 - Cmpss2Regs
Mapping registers: C28xx_CPU2 - Cmpss3Regs
Mapping registers: C28xx_CPU2 - Cmpss4Regs
Mapping registers: C28xx_CPU2 - Cmpss5Regs
Mapping registers: C28xx_CPU2 - Cmpss6Regs
Mapping registers: C28xx_CPU2 - Cmpss7Regs
Mapping registers: C28xx_CPU2 - Cmpss8Regs
Mapping registers: C28xx_CPU2 - CpuSysRegs
Mapping registers: C28xx_CPU2 - CpuTimer0Regs
Mapping registers: C28xx_CPU2 - CpuTimer1Regs
Mapping registers: C28xx_CPU2 - CpuTimer2Regs
Mapping registers: C28xx_CPU2 - DacaRegs
Mapping registers: C28xx_CPU2 - DacbRegs
Mapping registers: C28xx_CPU2 - DaccRegs
Mapping registers: C28xx_CPU2 - DcsmCommonRegs
Mapping registers: C28xx_CPU2 - DcsmZ1Regs
Mapping registers: C28xx_CPU2 - DcsmZ2Regs
Mapping registers: C28xx_CPU2 - DmaClaSrcSelRegs
Mapping registers: C28xx_CPU2 - DmaRegs
Mapping registers: C28xx_CPU2 - DmaCh1Regs
Mapping registers: C28xx_CPU2 - DmaCh2Regs
Mapping registers: C28xx_CPU2 - DmaCh3Regs
Mapping registers: C28xx_CPU2 - DmaCh4Regs
Mapping registers: C28xx_CPU2 - DmaCh5Regs
Mapping registers: C28xx_CPU2 - DmaCh6Regs
Mapping registers: C28xx_CPU2 - ECap1Regs
Mapping registers: C28xx_CPU2 - ECap2Regs
Mapping registers: C28xx_CPU2 - ECap3Regs
Mapping registers: C28xx_CPU2 - ECap4Regs
Mapping registers: C28xx_CPU2 - ECap5Regs
Mapping registers: C28xx_CPU2 - ECap6Regs
Mapping registers: C28xx_CPU2 - Emif1ConfigRegs
Mapping registers: C28xx_CPU2 - Emif1Regs
Mapping registers: C28xx_CPU2 - EPwm1Regs
Mapping registers: C28xx_CPU2 - EPwm2Regs
Mapping registers: C28xx_CPU2 - EPwm3Regs
Mapping registers: C28xx_CPU2 - EPwm4Regs
Mapping registers: C28xx_CPU2 - EPwm5Regs
Mapping registers: C28xx_CPU2 - EPwm6Regs
Mapping registers: C28xx_CPU2 - EPwm7Regs
Mapping registers: C28xx_CPU2 - EPwm8Regs
Mapping registers: C28xx_CPU2 - EPwm9Regs
Mapping registers: C28xx_CPU2 - EPwm10Regs
Mapping registers: C28xx_CPU2 - EPwm11Regs
Mapping registers: C28xx_CPU2 - EPwm12Regs
Mapping registers: C28xx_CPU2 - EQep1Regs
Mapping registers: C28xx_CPU2 - EQep2Regs
Mapping registers: C28xx_CPU2 - EQep3Regs
Mapping registers: C28xx_CPU2 - FlashCtrlRegs
Mapping registers: C28xx_CPU2 - FlashEccRegs
Mapping registers: C28xx_CPU2 - FlashPumpSemaphoreRegs
Mapping registers: C28xx_CPU2 - GpioDataRegs
Mapping registers: C28xx_CPU2 - I2caRegs
Mapping registers: C28xx_CPU2 - I2cbRegs
Mapping registers: C28xx_CPU2 - IpcRegs
Mapping registers: C28xx_CPU2 - McbspaRegs
Mapping registers: C28xx_CPU2 - McbspbRegs
Mapping registers: C28xx_CPU2 - MemCfgRegs
Mapping registers: C28xx_CPU2 - MemoryErrorRegs
Mapping registers: C28xx_CPU2 - NmiIntruptRegs
Mapping registers: C28xx_CPU2 - PieCtrlRegs
Mapping registers: C28xx_CPU2 - SciaRegs
Mapping registers: C28xx_CPU2 - ScibRegs
Mapping registers: C28xx_CPU2 - ScicRegs
Mapping registers: C28xx_CPU2 - ScidRegs
Mapping registers: C28xx_CPU2 - Sdfm1Regs
Mapping registers: C28xx_CPU2 - Sdfm2Regs
Mapping registers: C28xx_CPU2 - SpiaRegs
Mapping registers: C28xx_CPU2 - SpibRegs
Mapping registers: C28xx_CPU2 - SpicRegs
Mapping registers: C28xx_CPU2 - WdRegs
Mapping registers: C28xx_CPU2 - XintRegs
Mapping registers: C28xx_CPU2 - Hidden
Building search data: C28xx_CPU2
Applying virtual groups: C28xx_CPU2 - VCU
Executing Startup Scripts: C28xx_CPU2
Initializing: CPU2_CLA1
Mapping registers: CPU2_CLA1 - Core Registers
Mapping registers: CPU2_CLA1 - CPU2_CLA1
Mapping registers: CPU2_CLA1 - Hidden
Building search data: CPU2_CLA1
Executing Startup Scripts: CPU2_CLA1
Connecting...
GEL: C28xx_CPU2: GEL Output:
Memory Map Initialization Complete
info: C28xx_CPU2: If erase/program (E/P) operation is being done on one core, the other core should not execute from shared-RAM (SR) as they are used for the E/P code. Also, CPU1 will be halted to determine SR ownership for the CPU which will run the Flash Plugin code, after which CPU1 will be set to run its application. User code execution from SR could commence after both flash banks are programmed.
Loading Program: user_files/images/Cpu2_jtag_1_0_183.bin
Preparing ...
0 of 32752 at 0x80000
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
Erasing Flash
Erasing Bank 0, Sector A
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
Erasing Bank 0, Sector B: 6%
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
Erasing Bank 0, Sector C: 13%
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
Erasing Bank 0, Sector D: 20%
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
Erasing Bank 0, Sector E: 26%
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
Erasing Bank 0, Sector F: 33%
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
Erasing Bank 0, Sector G: 40%
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
Erasing Bank 0, Sector H: 46%
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
Erasing Bank 0, Sector I: 53%
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
Erasing Bank 0, Sector J: 60%
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
Erasing Bank 0, Sector K: 66%
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
Erasing Bank 0, Sector L: 73%
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
Erasing Bank 0, Sector M: 80%
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
Erasing Bank 0, Sector N: 86%
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
0 of 32752 at 0x83ff8: 24%
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
error: C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
error: C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
error: C28xx_CPU2: Error during Flash verification. Address of failure: 0x00085BFE, Data on target: 0xB423B413, Data from program: 0xB423B415 (0)
error: C28xx_CPU2: Flash verification returned error condition. Operation cancelled.
error: C28xx_CPU2: File Loader: Memory write failed: Unknown error
Finished: 24%
Failed: File: user_files/images/Cpu2_jtag_1_0_183.bin: Load failed.
