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TMS320F2810: ADC Behaviour

Part Number: TMS320F2810


Hello,

 

I’m using the F2810PBKA and I have noticed this odd behavior of the ADC.

 

1st test:  Vin = 0.1V continuous voltage without noise

ADC_result = 0.1V/3.0V*4095= 136bit

The 2810 result is correct = 136

 

2nd test : Vin = 0.11V continuous voltage with added a noise of 0.02Vpp (Signal Vmax=0.13V Vmin= 0.09V)

The 2810 result is always as it sees the Vmin= 0.09V/3.0V*4095= 122bit

 

Why does the ADC give always the minimum?

 

I’m using the ADC in simultaneuous sampling mode with the ADC (ADCLK) 25 MHz.

The same result happens if I work at ADCLK= 5 MHz.

Many Thanks for the support,

 

FAX

  • HI Fax

    Whats your ACQPS setting?

    Thanks
    Nabil
  • Hello,
    ACQ_PS=0

    I have tried to increase the ACQ_PS (ADCLK=25 MHz) but the result was the same

    Many Thanks for the support,
    Davide
  • Davide

    1. Can you provide more information on how and when you're triggering SOC? Are you using TI example code you check this? If you are, can you point to it or if not, can you share the code here?

    2. How many conversions are you taking?

    3. What happens if you increase the voltage on the ADCIN pin from 0.1V DC to 1V DC. Do you see correct converted value. Then introduce the 0.02V. What if you change that to 0.05? Do you still see the same behavior?

    4. Also, what board is this being done on?

    -Nabil

  •  Dear Nabil

    1. SOC is triggered by Event Manager A. Attached the init code of the ADC

    2. All the conversion are affected by this problem

    3. I have tried to increase the continuous voltage to 0.2V but the problem still remain. I cannot increase anymorethe voltage  because this signal is the current feedback of a loop.

    4. The board is an our development.

     

    Regards,

    Davide

    ADC.asm

  • Davide,

    Can you describe the noise?  Is it something intentional that you are adding for testing or is it inherent in the system?  Is it periodic?  How are you measuring the noise?

    Can you also describe how the signal is supplied to the ADC pin?  Are there RC components?  An op-amp buffer?

    -Tommy

  • Tommy,
    the DSP is used in a three-phase inverter application working at 3.6 KHz and there are all the normal disturbance of this environment.
    I understood that the problem could be a continuous sample synchronized with the noise, but I always found a sample below the value of the waveform of the scope. I was only to understand if the ADC could give the minimum value in presence of a noise ?
    The signal is acquired from the DSP in this way:
    Op-amp buffer –> R(2k)—>C(to GND)(1n)-> BA54S(+3V3,GND)-> ADC_DSP
    I have already tried to change the C from 1n to 10n but it does not have any improvement.

    Regards,
    Davide
  • Davide,

    Can you help us understand the severity of the issue?  Is the system malfunctioning because of this behavior?

    The ADC on this device has 10.1 ENOB so we expect about 2.7mV of resolution at 100kHz, which applies to your 3.6kHz application.  We don't have a ready answer to explain your observations because it is contrary to our own expectations.

    To understand the root cause of your ADC behavior, we will want to approach your setup from a solid foundation where the ADC is working as expected and then methodically add experimental variables until the ADC begins to deviate from expectations.

    From your original post, it sounds like clean DC signals are converted properly so we can start there.  Can you confirm that clean AC signals are converted properly?  For example, if you supply a clean, buffered 20mV sine wave at 20kHz (or other target frequency), can the ADC detect the signal?  Is your scope also able to detect the clean AC signal?

    -Tommy