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TMS320F28377D: Problems with generating phase shifted PWM signals

Md%20Mejbaul%20Haque
Intellectual 330 points
Part Number: TMS320F28377D


Hi all,

I have written the code for generating three phase shifted PWM signals using EPWM1, EPWM2 and EPWM3 channels as shown in the picture. However, after running the code I can not see any signals coming out of the channels.

Could you please help me finding what wrong am I doing with the code?

Best regards,

Haque   

main.c


#include "F28x_Project.h"
//#include "adc_new.h"
#include "pwm.h"


int main (void)
{

InitSysCtrl();

pwm_init();
// ADC_init();


while (1) {
asm ("NOP");
}

return (1);
}

pwm.c

#include "pwm.h"
//#include "modulator_instance.h"
//#include "adc_new.h"
//#include "PLL.h"
//#include "measurement.h"
//unsigned int comp;

float duty_p1;
float duty_p2;
float duty_p3;

void pwm_init()
{
//enable PWM modules+ for three converter

CpuSysRegs.PCLKCR2.bit.EPWM1 = 1;
CpuSysRegs.PCLKCR2.bit.EPWM2 = 1;
CpuSysRegs.PCLKCR2.bit.EPWM3 = 1;

//Configure output pins for three converter

InitEPwm1Gpio();
InitEPwm2Gpio();
InitEPwm3Gpio();


//configure interrupt
DINT;

InitPieCtrl();

// Disable CPU interrupts and clear all CPU interrupt flags:
IER = 0x0000;
IFR = 0x0000;

InitPieVectTable();

EALLOW;
PieVectTable.EPWM1_INT = &pwm_interrupt;
EDIS; // This is needed to disable write to EALLOW protected registers

//setup PWM channels...
EALLOW;
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC =0;
EDIS;

configure_pwm1();
configure_pwm2();
configure_pwm3();


EALLOW;
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC =1;
EDIS;

// enable PIE interrupts
IER |= M_INT3;
PieCtrlRegs.PIEIER3.bit.INTx1 = 1;

// configure a pin for interrupt usage...
EALLOW;
GpioCtrlRegs.GPADIR.bit.GPIO13 = 1;
EDIS;

// enable interrupts, openloop will start...
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM


}

void configure_pwm1()
{
EPwm1Regs.TBPRD = 1250; // Set timer period
EPwm1Regs.TBPHS.bit.TBPHS = 0x0000; // Phase is 0
EPwm1Regs.TBCTR = 0x0000; // Clear counter

// Setup TBCLK
EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up
EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Disable phase loading
EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUT
EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV2;

EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; // Load registers every ZERO
EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;

}

void configure_pwm2()
{
EPwm2Regs.TBPRD = 1250; // Set timer period
EPwm2Regs.TBPHS.bit.TBPHS = 0x009C; // Phase is 45 degree (TBPHS 156)
EPwm2Regs.TBCTR = 0x0000; // Clear counter

// Setup TBCLK
EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up
EPwm2Regs.TBCTL.bit.PHSEN = TB_ENABLE; // Enable phase loading
EPwm2Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUT
EPwm2Regs.TBCTL.bit.CLKDIV = TB_DIV2;

EPwm2Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; // Load registers every ZERO
EPwm2Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm2Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
EPwm2Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;


}

void configure_pwm3()
{
EPwm3Regs.TBPRD = 1250; // Set timer period
EPwm3Regs.TBPHS.bit.TBPHS = 0x0138; // Phase is 90 degree (TBPHS 312)
EPwm3Regs.TBCTR = 0x0000; // Clear counter

// Setup TBCLK
EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up
EPwm3Regs.TBCTL.bit.PHSEN = TB_ENABLE; // Enable phase loading
EPwm3Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUT
EPwm3Regs.TBCTL.bit.CLKDIV = TB_DIV2;

EPwm3Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; // Load registers every ZERO
EPwm3Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm3Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
EPwm3Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;


}

__interrupt void pwm_interrupt (void)
{


GpioDataRegs.GPASET.bit.GPIO13 = 1;

// doall measurement()
// pll tick
// series volt reg tick
// shunt reg tick
// dc bus reg tick

//set duty cycles for series converter
duty_p1 = (float)PWM_PERIOD / 2;
EPwm1Regs.CMPA.bit.CMPA = (int) duty_p1;
EPwm1Regs.CMPB.bit.CMPB = (int) duty_p1;

// Set actions
EPwm1Regs.AQCTLA.bit.CAU = AQ_SET; // Set PWM1A on Zero
EPwm1Regs.AQCTLA.bit.CAD = AQ_CLEAR;

EPwm1Regs.AQCTLB.bit.CAU = AQ_CLEAR; // Set PWM1B on Zero
EPwm1Regs.AQCTLB.bit.CAD = AQ_SET;


duty_p2 = (float)PWM_PERIOD / 2;
EPwm2Regs.CMPA.bit.CMPA = (int) duty_p2;
EPwm2Regs.CMPB.bit.CMPB = (int) duty_p2;

// Set actions
EPwm2Regs.AQCTLA.bit.CAU = AQ_SET; // Set PWM1A on Zero
EPwm2Regs.AQCTLA.bit.CAD = AQ_CLEAR;

EPwm2Regs.AQCTLB.bit.CAU = AQ_CLEAR; // Set PWM1A on Zero
EPwm2Regs.AQCTLB.bit.CAD = AQ_SET;


duty_p3 = (float)PWM_PERIOD / 2;
EPwm3Regs.CMPA.bit.CMPA = (int) duty_p3;
EPwm3Regs.CMPB.bit.CMPB = (int) duty_p3;

// Set actions
EPwm3Regs.AQCTLA.bit.CAU = AQ_SET; // Set PWM1A on Zero
EPwm3Regs.AQCTLA.bit.CAD = AQ_CLEAR;

EPwm3Regs.AQCTLB.bit.CAU = AQ_CLEAR; // Set PWM1B on Zero
EPwm3Regs.AQCTLB.bit.CAD = AQ_SET;

EPwm1Regs.ETCLR.bit.INT = 1;
PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;

GpioDataRegs.GPACLEAR.bit.GPIO13 = 1;

}

pwm.h

#ifndef PWM_H_
#define PWM_H_


#include "F28x_Project.h"
//#include "sine_modulator.h"

#define PWM_PERIOD 1250
extern float duty_p1;
extern float duty_p2;
extern float duty_p3;

void pwm_init();

// PWM 1~3 for three converters
void configure_pwm1();
void configure_pwm2();
void configure_pwm3();

__interrupt void pwm_interrupt (void);


#endif /* PWM_H_ */

I would be glad if anyone of you can help me with this issue.

Regards

Haque

  • 0
    TI__Guru 52040 points
    Can I see your code for the ePWM GPIO initialization? I would like to make sure that the muxes are correctly configured for ePWM outputs.
  • 0 in reply to Nima Eskandari
    Intellectual 330 points
    Hi Nima,

    The code I have written for it is all attached here. Specifically I have initialized the EpwmGpio pin configurations as below which is in the above code. Please see the code below. I am eagerly waiting for your response.

    Best regards,
    Haque

    //enable PWM modules+ for three converter

    CpuSysRegs.PCLKCR2.bit.EPWM1 = 1;
    CpuSysRegs.PCLKCR2.bit.EPWM2 = 1;
    CpuSysRegs.PCLKCR2.bit.EPWM3 = 1;

    //Configure output pins for three converter

    InitEPwm1Gpio();
    InitEPwm2Gpio();
    InitEPwm3Gpio();


    //configure interrupt
    DINT;

    InitPieCtrl();

    // Disable CPU interrupts and clear all CPU interrupt flags:
    IER = 0x0000;
    IFR = 0x0000;

    InitPieVectTable();

    EALLOW;
    PieVectTable.EPWM1_INT = &pwm_interrupt;
    EDIS; // This is needed to disable write to EALLOW protected registers

    //setup PWM channels...
    EALLOW;
    CpuSysRegs.PCLKCR0.bit.TBCLKSYNC =0;
    EDIS;

    configure_pwm1();
    configure_pwm2();
    configure_pwm3();


    EALLOW;
    CpuSysRegs.PCLKCR0.bit.TBCLKSYNC =1;
    EDIS;
  • 0 in reply to Md%20Mejbaul%20Haque
    TI__Guru 52040 points

    Could you please share the code for InitEPwm1Gpio, InitEPwm2Gpio and InitEPwm3Gpio? I would like to double check the lines of code which configures the GPIO mux.

  • 0 in reply to Nima Eskandari
    TI__Guru 52040 points
    Haque,

    I would like to make sure your are correctly setting up the GPIOs. Could you share your code for InitEPwm1Gpio?

    Nima
  • 0 in reply to Nima Eskandari
    TI__Guru 52040 points

    Due to inactivity I will be closing this thread please post again if you have any questions. But here is what I believe could solve your problem.

    Inside the F2837x_EPwm.c, the GPIO muxes for the ePWM modules are set up. Here is an example of setting up GPIOs for ePWM1:

    //
// InitEPwm1Gpio - Initialize EPWM1 GPIOs
//
void InitEPwm1Gpio(void)
{
    EALLOW;

    //
    // Disable internal pull-up for the selected output pins
    // for reduced power consumption
    // Pull-ups can be enabled or disabled by the user.
    // Comment out other unwanted lines.
    //
    GpioCtrlRegs.GPAPUD.bit.GPIO0 = 1;    // Disable pull-up on GPIO0 (EPWM1A)
    GpioCtrlRegs.GPAPUD.bit.GPIO1 = 1;    // Disable pull-up on GPIO1 (EPWM1B)
    // GpioCtrlRegs.GPEPUD.bit.GPIO145 = 1;    // Disable pull-up on GPIO145 (EPWM1A)
    // GpioCtrlRegs.GPEPUD.bit.GPIO146 = 1;    // Disable pull-up on GPIO146 (EPWM1B)

    //
    // Configure EPWM-1 pins using GPIO regs
    // This specifies which of the possible GPIO pins will be EPWM1 functional
    // pins.
    // Comment out other unwanted lines.
    //
    GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 1;   // Configure GPIO0 as EPWM1A
    GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 1;   // Configure GPIO1 as EPWM1B
    // GpioCtrlRegs.GPEMUX2.bit.GPIO145 = 1;   // Configure GPIO145 as EPWM1A
    // GpioCtrlRegs.GPEMUX2.bit.GPIO146 = 1;   // Configure GPIO0146 as EPWM1B

    EDIS;
}

    Please change the GPIO numbers to the specific ones in your application.