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TMS320F28379D: TMS320F28379D EMI1 to asynch SRAM not working

Gilmer Vega
Prodigy 120 points

Part Number: TMS320F28379D
Other Parts Discussed in Thread: C2000WARE

Hi,

I am working on an application that needs to use an asynchronous SRAM (Cypress CY62187EV30) to store data using a F2837x controlCard Rev1.3. I configured the EMI1 interface to communicate with it; however, I am having issues with the data I am writing/reading. I am following the "emif1_16bit_asram_cpu01" as a reference and this is not working either.

I configured EM1BA[1] as address 0, and then rest of GPIO's as address 1 and son on. The datasheet states that only EM1BA[1] should be used for a 16 bit interface; however, the example goes on and configures EM1BA[0] as well. Do I need to configure both bits for a 16 bit interface ?

Please let me know if you can help me with this issue.

Thanks,

Gilmer

  • 0
    TI__Guru 62975 points
    Gilmer,

    The datasheet is correct about the BA1 mapping to ADDR0 for 16-bit RAM.

    Are you using the high density External Connector header on the back of the controlCARD? If so, please be aware that this External Connector is routed to the EMIF2 pins rather than EMIF1.

    -Tommy
  • 0 in reply to tlee
    Prodigy 120 points

    Hi Tommy,

    I apologize for the late reply.

    No, I'm not using the External Connector. For this particular test I am using EMIF1. Eventually, my application will use both EMIF1 and EMIF2 as well as both cores.

    I have the following configuration for my address lines,

    A0 (on external async sram) as BA1

    A1 as EM1A0

    A2 as EM1A1

    ...

    A19 as EM1A8

    Is this configuration right if I want to address 1M-16 bit words? From the TMS320F28379D data sheet, Table 7.8 GPIO Muxed Pins, I noticed there can be Pin Mux conflict at starting at GPIO86. Will some of these GPIOs need to be configured with a GPIO Index of 3 instead of 2 so that they function as EM1DQM0, EM1DQM1, EM1DQM2, EM1DQM3; hence losing address lines ?

    Please advise.

    Thank you,

    -Gilmer

  • 0 in reply to Gilmer Vega
    TI__Guru 62975 points

    Gilmer,

    That sounds right.  For asynchronous memory, dynamic control of the DQ signals is not required when interfacing with 16-bit memory.

    Here's an EMIF Application Note that you can reference for similar questions and concerns.  There are associated examples and a configuration tool in C2000Ware that you may also find useful.

    -Tommy

  • 0 in reply to tlee
    Prodigy 120 points
    Thanks a lot!