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TMS320F28335: XCLKOUT stabilize time

DHAIVAT JANI
Prodigy 230 points
Part Number: TMS320F28335


Hi there,

My questions is with regards to the XCLKOUT signal when using a 150MHz external oscillator

1. Is the  XCLKOUT signal continuous once stable at 150MHz.

2. How long does it take  XCLKOUT signal to stabilise to 150MHz upon power up as I can see from the data sheet it goes through various transitions. The datasheet is not clear about this. Can you please explain in detail.

3. Can I use  XCLKOUT signal to drive external logic  like (DPRAM IP) inside a FPGA device without locking the logic out due to the various transitions of clock at power up.

Best regards,

Dhaivat

  • 0
    Guru 30330 points
    Dhaivat,

    1. XCLKOUT is continuous at 150MHz.
    2. We do not specify the startup time for XCLKOUT. It is derived from SYSCLK. As your program begins to execute, you will configure the PLL, which then becomes SYSCLK after you have locked the new frequency. You will see these states on the pin as your application executes and sets up the clock.
    3. Please refer to the XINTF user guide (SPRU949) and the F28335 datasheet for more information about using the XCLKOUT to drive an external IC. Typically this is used for a memory interface. There is also a wiki page that has been written for the Type0 XINTF, but is still applicable to the Type 1 XINTF present on F28335: processors.wiki.ti.com/.../External_Interface_XINTF_Type_0_FAQ_for_C2000

    Please let me know if you have additional questions.

    Thanks,
    Mark