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CCS/TMS320F28377D: CCS/TMS320F28377D

Part Number: TMS320F28377D
Other Parts Discussed in Thread: UNIFLASH, CONTROLSUITE

Tool/software: Code Composer Studio

Hi,

We have a batch of TMS320F28377DZWTT that cannot use on-chip Flash of CPU2. CPU1 Flash can be programmed, but CPU2 Flash cannot ( We test CPU2 RAM is ok ). All environments are the same, if I use TMX320F28377DZWTT replace it, then CPU1 & CPU2 Flash can be programmed. I use XDS100v2 & XDS200, CCS 7.1.0 & UniFlash. Is it mean CPU2 Flash can't be connected by Emulator?

The error is shown below:

[2018/3/30 上午11:09:21] [INFO] C28xx_CPU2: GEL Output: Memory Map Initialization Complete

[2018/3/30 上午11:09:21] [INFO] C28xx_CPU1: GEL Output: Memory Map Initialization Complete

[2018/3/30 上午11:09:22] [INFO] C28xx_CPU2: If erase/program (E/P) operation is being done on one core, the other core should not execute from shared-RAM (SR) as they are used for the E/P code. Also, CPU1 will be halted to determine SR ownership for the CPU which will run the Flash Plugin code, after which CPU1 will be set to run its application. User code execution from SR could commence after both flash banks are programmed.

[2018/3/30 上午11:09:22] [INFO] C28xx_CPU1: If erase/program (E/P) operation is being done on one core, the other core should not execute from shared-RAM (SR) as they are used for the E/P code. Also, CPU1 will be halted to determine SR ownership for the CPU which will run the Flash Plugin code, after which CPU1 will be set to run its application. User code execution from SR could commence after both flash banks are programmed.

[2018/3/30 上午11:09:28] [SUCCESS] Program Load completed successfully.

[2018/3/30 上午11:09:40] [INFO] C28xx_CPU2: GEL Output: Memory Map Initialization Complete

[2018/3/30 上午11:09:40] [INFO] C28xx_CPU1: GEL Output: Memory Map Initialization Complete

[2018/3/30 上午11:09:41] [ERROR] C28xx_CPU2: Error: (Error -1135 @ 0xC0CC) The debug probe reported an error. Confirm debug probe configuration and connections, reset the debug probe, and retry the operation. (Emulation package 6.0.628.3)

[2018/3/30 上午11:09:41] [ERROR] C28xx_CPU2: Trouble Halting Target CPU: (Error -1044 @ 0x0) The debug probe reported an error. Confirm debug probe configuration and connections, reset the debug probe, and retry the operation. (Emulation package 6.0.628.3)

[2018/3/30 上午11:09:41] [ERROR] C28xx_CPU2: Error: (Error -1135 @ 0xC0CC) The debug probe reported an error. Confirm debug probe configuration and connections, reset the debug probe, and retry the operation. (Emulation package 6.0.628.3)

[2018/3/30 上午11:09:42] [ERROR] C28xx_CPU2: Unable to determine target status after 20 attempts

[2018/3/30 上午11:09:42] [ERROR] C28xx_CPU2: Failed to remove the debug state from the target before disconnecting. There may still be breakpoint op-codes embedded in program memory. It is recommended that you reset the emulator before you connect and reload your program before you continue debugging

[2018/3/30 上午11:09:46] [ERROR] C28xx_CPU1: Error: (Error -1044 @ 0x0) The debug probe reported an error. Confirm debug probe configuration and connections, reset the debug probe, and retry the operation. (Emulation package 6.0.628.3)

[2018/3/30 上午11:09:46] [ERROR] C28xx_CPU1: Error: (Error -1135 @ 0x3FF16A) The debug probe reported an error. Confirm debug probe configuration and connections, reset the debug probe, and retry the operation. (Emulation package 6.0.628.3)

[2018/3/30 上午11:09:46] [ERROR] C28xx_CPU1: Unable to determine target status after 20 attempts

[2018/3/30 上午11:09:46] [ERROR] C28xx_CPU1: Failed to remove the debug state from the target before disconnecting. There may still be breakpoint op-codes embedded in program memory. It is recommended that you reset the emulator before you connect and reload your program before you continue debugging

[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not read 0x0007026D@Data: target is not connected

[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not write 0x0005F444@Data: target is not connected

[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not read 0x0005F444@Data: target is not connected

[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not read 0x00130@Program: target is not connected

[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error writing the PLL values. (Flash algorithm returned error code). Operation cancelled.

[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not write 0x0005D200@Data: target is not connected

[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: File Loader: Memory write failed: Unknown error

[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not read register PC: target is not connected

[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not write 0x0005F800@Data: target is not connected

[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not write 0x00000@Program: target is not connected

[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Cannot enable while the target is disconnected

[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not read 0x0005F444@Data: target is not connected

[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not read 0x0007026D@Data: target is not connected

[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not write 0x0005F444@Data: target is not connected

[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not read 0x0005F444@Data: target is not connected

[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error setting the GSxMSEL register for Flash operations

[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Failed to run target while trying to execute pwrite_en.alg

[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Flash operation timed out waiting for the algorithm to complete. Operation cancelled.

[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not read 0x0007026D@Data: target is not connected

[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not write 0x0005F444@Data: target is not connected

[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not read 0x0005F444@Data: target is not connected

[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not read 0x0007026D@Data: target is not connected

[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not write 0x0005D200@Data: target is not connected

[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not read 0x5D200@Program: target is not connected

[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not read 0x0007026D@Data: target is not connected

[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Flash Programmer: Unable to acquire the clock semaphore. The other core might still be accessing the clock registers. Operation Cancelled.

[2018/3/30 上午11:10:02] [ERROR] C28xx_CPU2: Error occurred during flash operation: Could not write register PC: target is not connected

  • Hi,

    Did you try programming CPU2 first and then CPU1? In the meantime I will check with Uniflash experts to see if there is any issue with the software.

    Regards,
    Nirav
  • Thanks for your reply, if i use CCS to program flash, problem still exists, not only by Uniflash. I adopt your suggestion and try programming CPU2 first and then CPU1, problem still exists.

  • Hi,

    When you are programming CPU2, is CPU1 connected to JTAG and halted? If not then please try to connect to CPU1 and halt it and then program the CPU2. If you are already doing that then could you just try to connect the JTAG to CPU2 instead of programming and see if that works.

    Regards,

    Vivek Singh

  • Thanks for your reply.
    When you are programming CPU2, is CPU1 connected to JTAG and halted? Yes, I do.
    If not then please try to connect to CPU1 and halt it and then program the CPU2. Yes, but CPU2 cannot be programmed.
    If you are already doing that then could you just try to connect the JTAG to CPU2 instead of programming and see if that works. Both CPU1 and CPU2 can run in the RAM.
  • Which version of Uniflash are you using? Can you try the latest version if that is not being used?

    Regards,

    Nirav

  • Thanks for your reply. I just try to use the latest version 4.2.2.1692, but the problem still exists.
  • Hi,

    Can you try exact below steps and see if it helps?

    1) Launch the target configuration from the Target configurations window (View -> Target Configurations -> Right click on the F28377D ccxml -> Launch selected configuration)

    2) Connect to CPU1 and then to CPU2 (In the debug window, select the C28xx_CPU1, right click -> Connect Target. Do the same thing for C28xx_CPU2).

    3) Reset CPU1 and then CPU2 (Select C28xx_CPU1, then in the debug window menu -> Run -> Reset -> CPU reset. Do this for C28xx_CPU2)

    4) Load the code in CPU2 (Select C28xx_CPU2 and then in the debug window menu click on "Run" -> Load -> Load program and choose the .out file that you want to load in to CPU2)

    If above sequence does not help, insert below step in between step 3 and step 4 above.

    3.1)  Execute the Boot-ROM code (click on the RESUME button in CCS debug window) on CPU1 and then CPU2.  Halt CPU1 and then CPU2, if the cores does not halt by themselves.

    If the above sequences do not help, upon failure, please check the Reset cause (RESC) register, NMI shadow flag (NMISHDFLG) register and the Boot-ROM status register.  Their values can give us some clue for further debug.

     

    Two more questions:

    1) What is the boot mode GPIO configuration used?

    2) Do you have any values allocated for DCSM fields in the coff file?  If yes, what fields and values are you using?

    Thanks and regards,

    Vamsi

  • Thanks for your reply.

    I follow the steps 1->2->3->3.1, RESC = 0xC0000000, NMISHDFLG = 0x0000, IPCBOOTSTS = 0x80020D00
    CPU1 Boot Status(Address 0x0000002C) = 0x00000001, CPU2 Boot ROM Status(Address 0x00000002) = 0x80020D00

    Note:
    3.1) Execute the Boot-ROM code (click on the RESUME button in CCS debug window) on CPU1 and then CPU2. Halt CPU1 and then CPU2, if the cores does not halt by themselves.
    I click on the RESUME button in CCS debug window on CPU1, then CPU2, CPU2 would halt automatically, and address is 0x3FE44E, then I chick on the RESUME button one more time and CPU2 would run.

    That I perform step 4, CPU1 & CPU2 disconnect automatically.

    Boot mode GPIO configuration is Get Mode(1 1), but Emulator is connected.

    I don't use DCSM fields, I just load example code in controlsuite(blinky_dc),
    C:\ti\controlSUITE\device_support\F2837xD\v210\F2837xD_examples_Dual\blinky_dc.
  • Hi,

    A) Please use serial or wait boot mode and do steps 1 -> 2 -> 3 -> 3.1 -> 4.

    When you do step 3.1, you don't need to click on the resume button twice for CPU2. If the core halts, you can proceed to step 4. If it does not halt, you can halt it and proceed to step 4.

    Did you check the register values after CPU2 load failure or before step 4? We need the values after CPU2 load failure (after step 4).

    B) Did you notice any XRSn toggle during CPU2 programming? May be the voltage line is falling under the spec? Please check e2e.ti.com/.../2230646

    C) Also, please check if this helps: e2e.ti.com/.../553977

    Thanks and regards,
    Vamsi
  • Thanks for your replay.

    I can use C2Prog to program CPU2 successfully. But I think it should not be the main issue, and I will do further experiments. Thanks.