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F28M35H52C: Problem with FLASH Program API

Part Number: F28M35H52C


Hi all,

Just recently on my last post with help from couple device experts i was able to resolve the issue i had with M3 Bootloader design. Below is my previous thread. 

But now without any changes to my code, when i tried again to run my application to my surprise the application does not Erase or program on FLASH at all !! which was not seen before. 

I am running my FLASH API's from RAM as always but not sure what just happened ?? I am able to program or erase from CCS flash plugin however. Can anybody let me know what could be going on here. 

Thanks 

  • Guys,

    I will take back what i said regarding code changes. I do have some changes but this was done for IPC module implementation to transfer hex data from M3 to C28 bootloader.

    But now i have got my M3 Erase and Program to work again by not referencing the below function, which is used for IPC purposes.

    void InitializeIPCsharedRAM(void){

    /* Initialize M3toC28 message RAM and Sx SARAM and wait until initialized */
    RAMMReqSharedMemAccess(S1_ACCESS, SX_M3MASTER);
    RAMMReqSharedMemAccess(S0_ACCESS, SX_M3MASTER);

    /*
    * Initialize Sx RAM and MtoC MSG RAM Used by Example
    */
    HWREG(RAM_CONFIG_BASE + RAM_O_MSXRTESTINIT1) |= 0x1;
    while((HWREG(RAM_CONFIG_BASE + RAM_O_MSXRINITDONE1)&0x1) != 0x1)
    {
    }

    HWREG(RAM_CONFIG_BASE + RAM_O_MTOCCRTESTINIT1) |= 0x1;
    while((HWREG(RAM_CONFIG_BASE + RAM_O_MTOCRINITDONE)&0x1) != 0x1)
    {
    }


    /* Allow Protection. */
    HWREG(SYSCTL_MWRALLOW) = 0;

    /*
    * Register M3 interrupt handlers. C28 to M3 IPC1 interrupt is used.
    */
    IntRegister(INT_CTOMPIC1, CtoMIPC1IntHandler);


    /* Initialize IPC Controllers */
    IPCMInitialize (&g_sIpcController1, IPC_INT1, IPC_INT1);


    /* Enable processor interrupts. */
    IntMasterEnable();

    /* Enable the IPC interrupts. */
    IntEnable(INT_CTOMPIC1);

    }

    When I call InitializeIPCsharedRAM before i make a progress to perform M3 application update, none of the FLASH contents gets erased or programmed. But works by not referencing this !!

    All i am trying to do here is claim the ownership of shared RAM Sx to Master M3. And no where i am using Sx RAM for M3 FLASH Erase or Write operations.

    So can anybody tell me how does calling this function affect FLASH functionality ??
  • Hi Preetham,

    In this function you have enabled the protection by HWREG(SYSCTL_MWRALLOW) = 0;

    After this function call please disable the protection (HWREG(SYSCTL_MWRALLOW) = 0xA5A5A5A5;)

    It is mentioned in the Flash API guide - www.ti.com/.../spnu595a.pdf
    "For M3: Before calling Flash API functions, MWRALLOW should be configured to allow API to write to
    protected register writes. Protected register writes can be disabled as needed after the Flash API
    usage."

    Let us know if you face any issue.

    Thanks,
    Katta