Tool/software: Code Composer Studio
Hi
I am trying to connect through the spi with external flash memory (MICROCHIP SST26VF064B) and I have a problem. When I m trying read ID of memory I do not get what I should. Could anone help me with this problem?
#include "F28x_Project.h" void delay_loop(void); void spi_xmit(Uint16 a); void spi_fifo_init(void); void spi_init(void); void error(void); void main(void) { Uint16 sdata; // send data Uint16 rdata; // received data InitSysCtrl(); GpioDataRegs.GPBCLEAR.bit.GPIO63 = 1; InitSpiaGpio(); InitSpi(); DINT; InitPieCtrl(); IER = 0x0000; IFR = 0x0000; InitPieVectTable(); // sdata = 0x009F; for(;;) { GpioDataRegs.GPCCLEAR.bit.GPIO64 = 1; spi_xmit(0x9F); rdata = SpiaRegs.SPIRXBUF; GpioDataRegs.GPCSET.bit.GPIO64 = 1; } } void error(void) { asm(" ESTOP0"); // Test failed!! Stop! for (;;); } void spi_xmit(Uint16 a) { SpiaRegs.SPITXBUF = a; }
//########################################################################### // // FILE: F2837xS_Spi.c // // TITLE: F2837xS SPI Initialization & Support Functions. // //########################################################################### // $TI Release: F2837xS Support Library v3.04.00.00 $ // $Release Date: Sun Mar 25 13:27:27 CDT 2018 $ // $Copyright: // Copyright (C) 2014-2018 Texas Instruments Incorporated - http://www.ti.com/ // // Redistribution and use in source and binary forms, with or without // modification, are permitted provided that the following conditions // are met: // // Redistributions of source code must retain the above copyright // notice, this list of conditions and the following disclaimer. // // Redistributions in binary form must reproduce the above copyright // notice, this list of conditions and the following disclaimer in the // documentation and/or other materials provided with the // distribution. // // Neither the name of Texas Instruments Incorporated nor the names of // its contributors may be used to endorse or promote products derived // from this software without specific prior written permission. // // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. // $ //########################################################################### // // Included Files // #include "F2837xS_device.h" #include "F2837xS_Examples.h" // // Calculate BRR: 7-bit baud rate register value // SPI CLK freq = 500 kHz // LSPCLK freq = CPU freq / 4 (by default) // BRR = (LSPCLK freq / SPI CLK freq) - 1 // #if CPU_FRQ_200MHZ #define SPI_BRR ((200E6 / 4) / 500E3) - 1 #endif #if CPU_FRQ_150MHZ #define SPI_BRR ((150E6 / 4) / 500E3) - 1 #endif #if CPU_FRQ_120MHZ #define SPI_BRR ((120E6 / 4) / 500E3) - 1 #endif // // InitSPI - This function initializes the SPI to a known state // void InitSpi(void) { // Initialize SPI-A // Set reset low before configuration changes // Clock polarity (0 == rising, 1 == falling) // 16-bit character // Enable loop-back SpiaRegs.SPICCR.bit.SPISWRESET = 0; SpiaRegs.SPICCR.bit.CLKPOLARITY = 0; SpiaRegs.SPICCR.bit.SPICHAR = (7); SpiaRegs.SPICCR.bit.SPILBK = 0; // Enable master (0 == slave, 1 == master) // Enable transmission (Talk) // Clock phase (0 == normal, 1 == delayed) // SPI interrupts are disabled SpiaRegs.SPICTL.bit.MASTER_SLAVE = 1; SpiaRegs.SPICTL.bit.TALK = 1; SpiaRegs.SPICTL.bit.CLK_PHASE = 0; SpiaRegs.SPICTL.bit.SPIINTENA = 0; // Set the baud rate SpiaRegs.SPIBRR.bit.SPI_BIT_RATE = SPI_BRR; // Set FREE bit // Halting on a breakpoint will not halt the SPI SpiaRegs.SPIPRI.bit.FREE = 1; // Release the SPI from reset SpiaRegs.SPICCR.bit.SPISWRESET = 1; } // // InitSpiGpio - This function initializes GPIO pins to function as SPI pins. // Each GPIO pin can be configured as a GPIO pin or up to 3 // different peripheral functional pins. By default all pins come // up as GPIO inputs after reset. // // Caution: // For each SPI peripheral // Only one GPIO pin should be enabled for SPISOMO operation. // Only one GPIO pin should be enabled for SPISOMI operation. // Only one GPIO pin should be enabled for SPICLK operation. // Only one GPIO pin should be enabled for SPISTE operation. // Comment out other unwanted lines. // void InitSpiGpio() { InitSpiaGpio(); } // // InitSpiaGpio - Initialize SPIA GPIOs // void InitSpiaGpio() { EALLOW; // // Enable internal pull-up for the selected pins // // Pull-ups can be enabled or disabled by the user. // This will enable the pullups for the specified pins. // Comment out other unwanted lines. // GpioCtrlRegs.GPBPUD.bit.GPIO58 = 0; // Enable pull-up on GPIO16 (SPISIMOA) GpioCtrlRegs.GPBPUD.bit.GPIO59 = 0; // Enable pull-up on GPIO17 (SPISOMIA) GpioCtrlRegs.GPBPUD.bit.GPIO60 = 0; // Enable pull-up on GPIO18 (SPICLKA) // // Set qualification for selected pins to asynch only // // Comment out other unwanted lines. // GpioCtrlRegs.GPBQSEL2.bit.GPIO58 = 3; // Asynch input GPIO16 (SPISIMOA) GpioCtrlRegs.GPBQSEL2.bit.GPIO59 = 3; // Asynch input GPIO17 (SPISOMIA) GpioCtrlRegs.GPBQSEL2.bit.GPIO60 = 3; // Asynch input GPIO18 (SPICLKA) // //Configure SPI-A pins using GPIO regs // // This specifies which of the possible GPIO pins will be SPI functional // pins. // Comment out other unwanted lines. // GpioCtrlRegs.GPBMUX2.bit.GPIO58 = 3; // Configure GPIO16 as SPISIMOA GpioCtrlRegs.GPBMUX2.bit.GPIO59 = 3; // Configure GPIO17 as SPISOMIA GpioCtrlRegs.GPBMUX2.bit.GPIO60 = 3; // Configure GPIO18 as SPICLKA GpioCtrlRegs.GPBGMUX2.bit.GPIO58 = 3; // Configure GPIO16 as SPISIMOA GpioCtrlRegs.GPBGMUX2.bit.GPIO59 = 3; // Configure GPIO17 as SPISOMIA GpioCtrlRegs.GPBGMUX2.bit.GPIO60 = 3; // Configure GPIO18 as SPICLKA GpioCtrlRegs.GPCPUD.bit.GPIO64 = 0; // Enable pull-up on GPIO58 (SPISTEA) GpioCtrlRegs.GPCMUX1.bit.GPIO64 = 0; // 0=GPIO, 1=MCLKRA, 2=SCITXDB, 3=EPWM7A GpioCtrlRegs.GPCDIR.bit.GPIO64 = 1; // 1=OUTput, 0=INput // GpioDataRegs.GPCSET.bit.GPIO64 = 1; // uncomment if --> Set High initially GpioCtrlRegs.GPBPUD.bit.GPIO63 = 0; // Enable pull-up on GPIO58 (WP) GpioCtrlRegs.GPBMUX2.bit.GPIO63 = 0; // 0=GPIO, 1=MCLKRA, 2=SCITXDB, 3=EPWM7A GpioCtrlRegs.GPBDIR.bit.GPIO63 = 1; // 1=OUTput, 0=INput // GpioDataRegs.GPBSET.bit.GPIO63 = 1; // uncomment if --> Set High initially EDIS; } // // End of file //
Best regards
Szymon