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TMS320F2812: FFT execution time - higher while using external RAM?

Part Number: TMS320F2812
Other Parts Discussed in Thread: C2000WARE, CONTROLSUITE

Can one define which RAM blocks has to be used for fetch, read, and write.

Say in the IDE, (CCS) could all be defined as internal, different RAM blocks

Any help appreciated

  • On C2000, the addresses and read/write functionality of RAM blocks are fixed. The user is able to allocate program or data sections freely in memory, something which would be specified in a linker command file and done at link time, rather than in the IDE. Accesses to external memory will be slower because of the timings of the XINTF interface.

    For an overview on linking I'd suggest section 2 of the F28379D multi-day workshop materials, at:
    processors.wiki.ti.com/.../C2000_Multi-Day_Workshop

    I may not have understood the question exactly so please post back if I've missed anything. Thanks.

    Regards,

    Richard
  • Richard,
    My question was "related" to a previous question about XINTF being slower, where David M. Alter and Lori Heustess replied to the poster that
    "........... For the same scenario in internal RAM, the fetch, read, and write could all be to different RAM blocks and there would be no bottleneck and everything would run single cycle. ...................."
    So I assumed it meant that one can 'assign' a block to read, another to write, and another to fetch?
    The F2812 Datasheet indicates it has
    – L0 and L1: 2 Blocks of 4K x 16 Each Single-Access RAM (SARAM)
    – H0: 1 Block of 8K x 16 SARAM
    – M0 and M1: 2 Blocks of 1K x 16 Each SARAM

    I am trying to figure out which DSP to choose, based on execution speed of a FFT, and 2D-FFT.
    I do not have enough experience in this, so perhaps some benchmark numbers can help choose between DSPs.

    Any help appreciated
  • Gerhard,

    On F2812 all internal memory is SARAM (single access RAM), so in each access cycle, only one read or write access can be made in each block. In applications such as filters or FFTs, we get maximum computational performance by simultaneously reading and writing multiple data and instructions. To accomplish this on F2812, the user needs to allocate data to different RAM blocks. This is done in the code by assigning named sections using CODE_SECTION and DATA_SECTION pragmas, something like this...

    #pragma DATA_SECTION(RFFTin1Buff,"RFFTdata1")
    float RFFTin1Buff[RFFT_SIZE];
    ...

    Then allocate those sections to specific memory blocks in the linker command file:

    RFFTdata1 : > RAMGS4, PAGE = 1, ALIGN = RFFT_ALIGNMENT
    RFFTdata2 : > RAMGS5, PAGE = 1
    RFFTdata3 : > RAMGS6, PAGE = 1
    RFFTdata4 : > RAMGS7, PAGE = 1

    It is very straightforward. I have not been able to find the related thread, but think this is what David and Lori meant.

    There are several FFT examples in C2000Ware, although I don't see one for the F2812. I don't think we have any examples of 2D-FFT.

    BTW, F2812 is not a very recent device. If this is for a new project, I'd recommend basing it on a newer device such as F2837x. Benchmarks for various FFT types are in the FPU DSP library document in C2000Ware. If you have that installed in the default location, it will be at:
    C:\ti\controlSUITE\libs\dsp\FPU\v1_50_00_00\doc

    Regards,

    Richard
  • Richard,

    Thank you very much for the information.

    Regards

  • Richard,

    I was looking at the TMS320F28377SPZPQ, but the FPU user guide indicates the libraries were written for the F2837xD device, so the dual core parts.

    Does this mean it will only work for the dual core parts?

    Regards
  • Gerhard,

    The libraries will work on either a dual or a single core part.  It's only that the examples were prepared on a dual core F2837xD board. 

    If you have a CCS project prepared for the single core part you should be able to use the library without difficulty by following the steps in chapter 4. Please post back here if you run into any difficulty.

    Regards,

    Richard